If/Video/Chroma/Deflection; Deflection Stage - Sanyo ACI-A Training Manual

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3-2 Video/Chroma
stage
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The composite video signal output from pin 8 of IC201, passes through the QI 84 and the
sound traps X181 (4.5 MHz), Xl 82(6. OMHZ) and Xl 83(6.5MHz)
to reject the sound carrier
components,
is then supplied to pin 10. The external video signal from the AV terminal is
supplied to pin 14.
The video signal input to pin 10 or 14 is separated into the luminance(Y)
and chrominance
(C) signals in IC201. The chroma signal is divided into R-Y and B-Y colour difference sig-
nals, which are demodulated
and output from pin 38(B-Y) and 39( R-Y). These signal pass
through the 1H delay line circuit(lC271 ), and are re-input to pins 36(B-Y) and 37( R-Y).
These R-Y/B-Y colour difference signals are supplied to the matrix circuit. The G-Y signal is
generated
by this circuit.
The external RGB signals for the on-screen display or teletext display are input to pins
29(B), 30(G) and 31(R). In the IC, the internal R-Y, G-Y, B-Y signals and the external R, G,
B signals are mixed in the selection circuit driven by the blanking signal input to pin 28, and
finally output to pins 33, 34 and 35. The -Y(luminance)
signal is output from pin 32.
The colour saturation, contrast, brightness, tint and sharpness controls can be controlled by
the CPU in 7 bits digital data through the analogue bus lines on pins 18 and 19.
3-3 Deflection stage
The horizontal oscillator circuit provides a 500kHz ceramic oscillator X361 connected to pin
23. The horizontal frequency is determined
by dividing the frequency by a 1/32 down
counter. The horizontal drive pulse is sent from pin 25 and drives drive transistor Q431.
The flyback pulse applied to pin 26 is performed the phase-shift
by integrating circuit con-
sisting of VR351 and C351, and used for the horizontal centring adjustment.
The vertical sync. is generated
by counting down the horizontal oscillation. The vertical drive
pulse sent from pin 20 to pin 2 of IC501, vertical output IC<LA7837>.
This IC has the automatic selection circuit for vertical sync. signal cycle from 50Hz or 60 Hz.
It outputs the result to pin 21. If the IC selects 60 Hz, it outputs the High to the pin.
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Training
Manual
AC I Chassis

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