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Nuvoton ISD1700 series Design Manual

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PRELIMINARY ISD1700 SERIES
ISD1700 Series
Design Guide
Publication Release Date: Nov 6, 2008
- 1 -
Revision 1.31

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  • Page 1 PRELIMINARY ISD1700 SERIES ISD1700 Series Design Guide Publication Release Date: Nov 6, 2008 - 1 - Revision 1.31...

  • Page 2: Table Of Contents

    PRELIMINARY ISD1700 SERIES TABLE OF CONTENTS GENERAL DESCRIPTION ......................6 FEATURES ............................7 BLOCK DIAGRAM ........................... 8 PINOUT CONFIGURATION ......................9 PIN DESCRIPTION ........................10 FUNCTIONAL DESCRIPTION ...................... 14 6.1 Detailed Description ....................... 14 6.1.1 Audio Quality ........................ 14 6.1.2 Message Duration ......................14 6.1.3 Flash Storage.......................
  • Page 3 PRELIMINARY ISD1700 SERIES 8.4.1 Microphone Input ......................26 8.4.2 AnaIn Input ........................27 8.5 System Management ......................27 CIRCULAR MEMORY ARCHITECTURE (CMA) ................28 9.1 Restoring Circular Memory Architecture ................30 10 SERIAL PERIPHERAL INTERFACE (SPI) MODE................ 31 10.1 Microcontroller Interface ......................31 10.2 SPI Interface Overview ......................
  • Page 4 PRELIMINARY ISD1700 SERIES 11.2.7 RD_PLAY_PTR (0x06) ....................50 11.2.8 RD_REC_PTR (0x08) ....................50 11.3 Analog Configuration Commands ..................51 11.3.1 RD_APC (0x44) Read APC Register ................51 11.3.2 WR_APC1 (0x45) Load APC Register ................ 51 11.3.3 WR_APC2 (0x65) Load APC Register ................ 52 11.3.4 WR_NVCFG (0x46) Write APC data into Non-Volatile Memory .........
  • Page 5 PRELIMINARY ISD1700 SERIES 15 TYPICAL APPLICATION CIRCUITS ..................... 76 15.1 Good Audio Design Practices ....................79 16 ORDERING INFORMATION ......................80 17 VERSION HISTORY ........................81 Publication Release Date: Nov 6, 2008 - 5 - Revision 1.31...

  • Page 6: General Description

    APC data into a non-volatile register (NVCFG) that is loaded at initialization. Utilizing the capabilities of ISD1700 Series, designers have the control and flexibility to implement voice functionality into the high-end products.

  • Page 7: Features

    PRELIMINARY ISD1700 SERIES 2 FEATURES Integrated message management systems for single-chip, push-button applications : level-trigger for recording : edge-trigger for individual message or level-trigger for looping playback sequentially PLAY : edge-triggered erase for first or last message or level-triggered erase for all messages...

  • Page 8: Block Diagram

    PRELIMINARY ISD1700 SERIES 3 BLOCK DIAGRAM Internal Sampling Timing Clock Clock AnaIn AUD / AnaIn Anti- Nonvolatile Aliasing Multi-Level Storage Filter Smoothing Volume Array Filter Control MIC+ MIC- Automatic Gain Control SPI Interface Power Conditioning Device Control REC PLAY ERASE...

  • Page 9: Pinout Configuration

    PRELIMINARY ISD1700 SERIES 4 PINOUT CONFIGURATION INT / RDY RESET ERASE MISO MOSI SCLK PLAY ISD1700 AnaIn MIC+ MIC- AUD / AUX SSP2 SSP1 SOIC / PDIP SCLK AnaIn MOSI MIC+ MISO MIC- RESET SSP2 ISD1700 INT / RDY SSP1...

  • Page 10: Pin Description

    PRELIMINARY ISD1700 SERIES 5 PIN DESCRIPTION PDIP / TSOP FUNCTIONS NAME SOIC Digital Power Supply: It is important to have a separate path for each power signal including V and V to minimize the noise coupling. Decoupling capacitors should be as close to the device as possible.
  • Page 11 PRELIMINARY ISD1700 SERIES PDIP / TSOP FUNCTIONS NAME SOIC SP-: The negative Class D PWM provides a differential output with SP+ pin to directly drive an 8 Ω speaker or typical buzzer. During power down or not used, this pin is tri-stated. This output can be controlled by D8 of APC register.
  • Page 12 PRELIMINARY ISD1700 SERIES PDIP / TSOP FUNCTIONS NAME SOIC Analog Power Supply. It is important to have a separate path for each power signal including V and V to minimize the noise coupling. Decoupling capacitors to V should be as close to the device as possible.
  • Page 13 PRELIMINARY ISD1700 SERIES PDIP / TSOP FUNCTIONS NAME SOIC Digital Ground: It is important to have a separate path for each ground signal including V and V to minimize the noise SSP1 SSP2 coupling. Note: 600 kΩ TDeb = Refer to AC Timing For any unused pins, left floated.

  • Page 14: Functional Description

    6.1.2 Message Duration The ISD1700 Series offer record and playback duration from 20 seconds to 480 seconds. Sampling frequency and message duration, T , are determined by an external resistor connected to the R pin.
  • Page 15 0x3CF 0x4BF 0x5AF 0x69F 0x78F Maximum Address Below figure shows the memory array architecture for ISD1700 series. 000 - 003 Accessible by 004 - 007 SPI Set Com m ands 008 - 00B or SE m ode 00C - 00F...

  • Page 16: Modes Of Operations

    PRELIMINARY ISD1700 SERIES 6.3 M ODES OF PERATIONS The ISD1700 Series can operate in either Standalone (Push-Button) or microcontroller (SPI) mode. 6.3.1 Standalone (Push-Button) Mode Standalone operation entails use of the PLAY ERASE pins to trigger operations. The internal state machine automatically configures the RESET audio path according to the desired operation.

  • Page 17: Analog Path Configuration (Apc)

    PRELIMINARY ISD1700 SERIES 7 ANALOG PATH CONFIGURATION (APC) The analog path of the ISD1700 can be configured to accommodate a wide variety of signal path possibilities. This includes the source of recording signals, mixing of input signals, mixing the playback signal with an input signal to the outputs, feed-through signal to the outputs and which outputs being activated.

  • Page 18: Device Analog Path Configurations

    PRELIMINARY ISD1700 SERIES Name Description Default SPI_FT For SPI mode only. Once SPI_PU command is sent, 1 = SPI_FT is Off is disabled and replaced by this control bit (D6) with the same functionality. After exiting SPI mode through the PD command, the resumes control of feed-through (FT) function.

  • Page 19: Standalone (Push-Button) Operations

    PRELIMINARY ISD1700 SERIES 8 STANDALONE (PUSH-BUTTON) OPERATIONS One can utilize the control to initiate a desired PLAY ERASE RESET operation. As completed, the device automatically enters into the power-down state. An unique message management system is executed under this mode, which links to an optional special Sound Effect (SE) feature to review certain operating status of the device.

  • Page 20: Exiting Se Mode

    PRELIMINARY ISD1700 SERIES . Similarly for play or erase function, pulse , respectively. Record PLAY ERASE source can be either Mic+/- or AnaIn. • A subsequent operation moves the record and playback pointers to the next SE sequentially. The LED will also blink one to four times after such operation to indicate which SE is active.

  • Page 21: Record Operation

    PRELIMINARY ISD1700 SERIES • If messages are present, the record pointer points to the next available memory row following the last message and the playback pointer points to the beginning of the last recorded message. The playback pointer is affected either by the operation.

  • Page 22: Forward Operation

    PRELIMINARY ISD1700 SERIES a) Edge-trigger mode: Pulsing Low once initiates a playback operation of the current PLAY message. Playback automatically stops at the end of the message. Pulsing again PLAY will re-play the message. During playback, the LED flashes and goes Off when the playback completes.

  • Page 23: Erase Operation

    PRELIMINARY ISD1700 SERIES • If SE2 is not recorded, device will flash LED twice with blinking period T • However, if SE2 is recorded, device plays SE2 and blinks the LED twice simultaneously. The LED blinking period is determined by the recorded duration, T of SE2.
  • Page 24 PRELIMINARY ISD1700 SERIES Update the playback pointer to the new first message - previously the second message (or new last message - originally the second to the last message). • If the device is in power down mode and the playback pointer is at any message other...

  • Page 25: Reset Operation

    PRELIMINARY ISD1700 SERIES is maintained Low continuously, the device will erase all messages ERASE and play SE4 with LED flashing simultaneously upon completion. During this process, the blinking periods of twice, three times and four times are limited by the recorded durations of SE2, SE3 and SE4 (T and T respectively.

  • Page 26: Ft (Feed-Through) Operation

    PRELIMINARY ISD1700 SERIES maximum level is reached a nd the cycle will start again. There are 8 steps of volume control. Each step changes the volume by 4 dB. The is debounced internally. A operation will re-initialize the volume level to the factory default state, which is the RESET maximum level.

  • Page 27: Anain Input

    PRELIMINARY ISD1700 SERIES 8.4.2 AnaIn Input INTERNAL TO THE DEVICE = 42K Ccoup 0.1uF = 42K ANAIN ANAIN INPUT AMPLIFIER Fcutoff=1/(2*pi*Ra*Ccoup) Figure 8.3: AnaIn input impedance (When the device is powered-up) 8.5 S YSTEM ANAGEMENT While in Standalone mode, it is recommended the designer to utilize the feedback from the pin, visual and optional SE indications for effective system management with respect to its operations.

  • Page 28: Circular Memory Architecture (Cma)

    PRELIMINARY ISD1700 SERIES 9 CIRCULAR MEMORY ARCHITECTURE (CMA) The ISD1700 has a built-in circular memory management protocol to handle message management internally in Standalone mode. Before the device attempts to access memory via push-button controls or the SPI equivalent commands, it checks the memory structure for conformity to this circular memory protocol.
  • Page 29 PRELIMINARY ISD1700 SERIES : Play : Play : Record : Record : Erase : Erase Erasable Erasable Non-erasable Non-erasable (Null) (Null) (Null) RECORD RECORD RECORD RECORD RECORD RECORD RECORD RECORD FWD x 2 FWD x 2 FWD x 3 FWD x 3...

  • Page 30: Restoring Circular Memory Architecture

    PRELIMINARY ISD1700 SERIES : Play : Play : Record : Record : Erase : Erase Erasable Erasable Non-erasable Non-erasable RECORD x 3 RECORD x 3 FWD x 2 FWD x 2 RECORD RECORD ERASE ERASE ERASE ERASE FWD x 3...

  • Page 31: Serial Peripheral Interface (Spi) Mode

    A four-wire (SCLK, MOSI, MISO & ) SPI interface can be used for serial communication to the ISD1700 device. The ISD1700 Series is configured to operate as a peripheral slave device. All operations can be controlled through this SPI interface.

  • Page 32: Mosi Data Format

    PRELIMINARY ISD1700 SERIES 10.2.2 MOSI Data Format MOSI is the Master Out Slave In data line of the SPI interface. Data is clocked into the device on the rising edge of the SCLK signal, with the least significant bit (LSB) first. Depending upon the command type, the format may be two bytes or as long as seven bytes.

  • Page 33: Miso Data Format

    PRELIMINARY ISD1700 SERIES 10.2.3 MISO Data Format Data is clocked out of the Master In Slave Out pin of ISD1700 device on the falling edge of the SCLK signal, with LSB first. MISO returns the status generated by the last command and current row address <A10:A0>...

  • Page 34: Spi Command Overview

    PRELIMINARY ISD1700 SERIES SPI Format D3 Dv MOSI where Cn & Dn represent input data bit of MOSI, while Bn are output data bit. The initial condition of the SPI inputs to the ISD1700 should be: = High SCLK = High MOSI = Low 10.3 SPI C...

  • Page 35: Switching From Spi Mode To Standalone Mode

    PRELIMINARY ISD1700 SERIES In SPI mode, the memory location is fully accessible via row address. The microcontroller (μC) can access any rows including the reserved Sound Effect rows (0x000-0x00F). The SET_PLAY, SET_REC, and SET_ERASE commands require a specified start address and end address. If start address and end address are the same, ISD1700 will perform the operation on that row only.
  • Page 36 PRELIMINARY ISD1700 SERIES Size: 16 bits Type: Read Byte #1 Bit # : Name : FULL CMD_ERR Byte #2 Bit # : Name : Description: Device status register Access Every SPI command returns SR0 as first two bytes in MISO Table 10.3 Bit description of Status Register 0...

  • Page 37: Status Register 1 (Sr1)

    PRELIMINARY ISD1700 SERIES 10.5.2 Status Register 1 (SR1) Size: 8 bits Type: Read Bit Sequence: PLAY ERASE Description: Device secondary status register Access RD_STATUS command. <D7:D0> is the third byte of MISO Table 10.4 Bit description of Status Register 1...

  • Page 38: Playback Pointer (Play_Ptr)

    PRELIMINARY ISD1700 SERIES 10.5.4 Playback Pointer ( PLAY_PTR Size: 11 bits Type: Read PLAY_PTR Bit Sequence: PLAY_PTR <A10:A0> Description: Pointer at beginning of current message Access Read: RD_PLAY_PTR; Changed by FWD, RESET, REC 10.5.5 Record Pointer (REC_PTR) Size: 11 bits...

  • Page 39: Spi Command Reference

    PRELIMINARY ISD1700 SERIES 11 SPI COMMAND REFERENCE This section describes the SPI command set. A summary of commands is given in Table 11.1 and commands are detailed in subsequent sub-sections. Table 11.1 SPI Command Reference Instructions Com- Data Data Byte2...
  • Page 40 PRELIMINARY ISD1700 SERIES Instructions Com- Data Data Byte2 Data Byte3 Description Address mand Byte1 or Start or Start Bytes 1/2/3 Byte Address Address Byte1 Byte2 WR_APC1 0x45 <D7:D0> <xxxx Write the data <D11:D0> into the D11:D8> APC register with volume setting from...

  • Page 41: Spi Priority Commands

    PRELIMINARY ISD1700 SERIES Before starting to write the program code, one has to fully understand the definition of each command and how to implement each of them correctly. If not, you may end up to spend lots of time and efforts in debugging the program code.

  • Page 42: Stop (0X02)

    PRELIMINARY ISD1700 SERIES 11.1.2 STOP (0x02) SCLK Command (02h) Data Byte 1 MOSI MSB LSB B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 MISO Status Register 0 : Bytes #1 & #2...

  • Page 43: Clr_Int(0X04)

    PRELIMINARY ISD1700 SERIES State before Execution Any, except PD State after Execution Registers Affected SR0, SR1, APC This command stops the current operation, if any, puts the device back to power down state, and clears the status of interrupt & EOM bits. As a result, all interrupt & EOM bits are cleared is released.

  • Page 44: Pd (0X07) Power Down

    PRELIMINARY ISD1700 SERIES Byte Sequence: MOSI 0x05 0x00 0x00 MISO Description: Read Status State before Execution State after Execution Does not affect state. Registers Affected None The Read Status command reads the status of the device. This command has three bytes.

  • Page 45: Devid (0X09) Read Device Id

    PRELIMINARY ISD1700 SERIES This command places the ISD1700 into power-down mode and also enable standalone mode. If command is sent during an active play/record/erase operation, the device will first finish the current operation then power down. Upon completion, the device generates an interrupt.

  • Page 46: Play (0X40)

    PRELIMINARY ISD1700 SERIES 11.2.1 PLAY (0x40) SCLK Command (40h) Data Byte 1 MOSI B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 MISO Status Register 0 : Bytes #1 & #2 PLAY Opcode:...

  • Page 47: Erase (0X42)

    PRELIMINARY ISD1700 SERIES Registers Affected SR0, SR1: REC & RDY bits The REC command starts record operation from current REC_PTR and stops when it receives STOP command or memory array is full. In record mode, the device only responds to STOP, RESET, CLR_INT, RD_STATUS and PD commands.

  • Page 48: G_Erase (0X43) Global Erase

    PRELIMINARY ISD1700 SERIES 11.2.4 G_ERASE (0x43) Global Erase SCLK Command (43h) Data Byte 1 MOSI MSB LSB B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 MISO Status Register 0 : Bytes #1 & #2...

  • Page 49: Chk_Mem (0X49) Check Circular Memory

    PRELIMINARY ISD1700 SERIES State after Execution Idle Registers Affected SR0, PLAY_PTR This command enables the PLAY_PTR to jump from current address to the start address of next message. Unlike the in standalone mode, FWD doesn’t interrupt a current playback operation and can only be issued in the SPI idle state. To emulate a...

  • Page 50: Rd_Play_Ptr (0X06)

    PRELIMINARY ISD1700 SERIES 11.2.7 RD_PLAY_PTR (0x06) 11 12 16 17 18 19 SCLK Command (06h) Data Byte 1 Data Byte 2 & Byte 3 MOSI MISO B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B30 B31 Status Register 0 : Bytes #1 &...

  • Page 51: Analog Configuration Commands

    PRELIMINARY ISD1700 SERIES This command reads out the record pointer address, where a push-button compatible record starts from. Prior sending this command, ensure circular memory architecture is satisfied by performing CHK_MEM. Otherwise, invalid data is obtained. 11.3 A NALOG ONFIGURATION OMMANDS These kind of commands allow the SPI host to configure the analog properties of the device.

  • Page 52: Wr_Apc2 (0X65) Load Apc Register

    PRELIMINARY ISD1700 SERIES Byte Sequence: MOSI 0x45 <D7:D0> <xxxxxD11:D8> MISO SR0: 1 byte Description: Load the data <D11:D0> to the APC register with volume setting from VOL State before Execution Idle State after Execution Idle Registers Affected The WR_APC1 command loads the desired data into the APC Register. There are three bytes involved: the first byte is command code, the second byte has data for APC<7:0>...

  • Page 53: Wr_Nvcfg (0X46) Write Apc Data Into Non-Volatile Memory

    PRELIMINARY ISD1700 SERIES 11.3.4 WR_NVCFG (0x46) Write APC data into Non-Volatile Memory SCLK Command (46h) Data Byte 1 MOSI MSB LSB B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 MISO Status Register 0 : Bytes #1 & #2...

  • Page 54: Direct Memory Access Commands

    PRELIMINARY ISD1700 SERIES 11.4 D IRECT EMORY CCESS OMMANDS These types of commands allow the SPI host to perform random access to any memory location by specifying the start and the end addresses. For the record and playback operations, the next pair of addresses can be preloaded.

  • Page 55: Set_Rec (0X81)

    PRELIMINARY ISD1700 SERIES The SET_PLAY command initiates playback operation from start address <S10:S0> and stops at end address <E10:E0>. In SET_PLAY mode, the device only responds to SET_PLAY, STOP, RESET, CLR_INT, RD_STATUS and PD commands. The CMD_ERR bit of SR0 is set if other commands are sent while in this mode. The RDY bit of SR1 is Low until the device has latched the addresses and begun the playback operation.

  • Page 56: Set_Erase (0X82)

    PRELIMINARY ISD1700 SERIES commands are sent while in this mode. The RDY bit of SR1 is Low until the device has latched addresses and begun recording. If no further command is sent, the device will record until end address <E10:E0> and write an EOM marker there. Once the RDY bit of SR1 returns to High, another SET_REC command can be sent.

  • Page 57: Extclk (0X4A)

    PRELIMINARY ISD1700 SERIES The additional command enhances the functionality and performance of the device in order to fulfill extra features and requirements that the designers may wish. 11.5.1 EXTCLK (0x4A) SCLK Command (4Ah) Data Byte 1 MOSI MSB LSB B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 MISO Status Register 0 : Bytes #1 &...

  • Page 58: General Guidelines For Writing Program Code

    PRELIMINARY ISD1700 SERIES 11.6 G ENERAL UIDELINES FOR RITING ROGRAM Besides realizing the basic functions under Standalone mode (if not, one should study the contents of Section 8), the software engineers must also fully understand the definition of each SPI command and how to implement each of them correctly (if not, one should review and comprehend the contents from Section 10 through Section 11.5).

  • Page 59: Examples Of Various Operating Sequences

    PRELIMINARY ISD1700 SERIES will be ignored. Bear in mind that no matter how quick the related task in ISD1700 can be performed, but its speed is still slower than that of code transmission from microcontroller. Therefore, after any of these commands is issued, one need to monitor the status on either...

  • Page 60: Record, Stop And Playback Operations

    PRELIMINARY ISD1700 SERIES 11.7.1 Record, Stop and Playback operations Apply Power / Reset Send PU Is CMD_ERR bit Check CMD_ERR set ? W ait T Clr_Int Check RDY bit Device Ready Send Record W ait Record Duration Send Stop Monitor INT status...

  • Page 61: Setrec And Setplay Operations

    PRELIMINARY ISD1700 SERIES 11.7.2 SetRec and SetPlay operations Apply Power / Reset Send PU Is CMD_ERR bit Check CMD_ERR set ? W ait T Clr_Int Check RDY bit Device Ready Send SetErase Monitor INT tatus for Completion Clr_Int Send SetRec...

  • Page 62: Wr_Apc2, Setrec And Setplay Operations

    PRELIMINARY ISD1700 SERIES 11.7.3 Wr_APC2, SetRec and SetPlay operations Apply Power / Reset Send PU Is CMD_ERR bit Check CMD_ERR set ? W ait T Clr_Int Send W r_APC2 Check RDY bit Device Ready Send SetRec Monitor INT status for Completion...

  • Page 63: Playback 3 Messages As 1 Message (Using Setplay)

    PRELIMINARY ISD1700 SERIES 11.7.4 Playback 3 Messages as 1 Message (using SetPlay) Playback 3 Messages as 1 Message (using SetPlay) Apply Power / Reset Send PU Is CMD_ERR bit Check CMD_ERR set ? W ait T Clr_Int Check RDY bit...

  • Page 64: Timing Diagrams

    PRELIMINARY ISD1700 SERIES 12 TIMING DIAGRAMS The following estimated timing diagrams are for basic operation and are not in proper scale. The LED and optional SE indications include automatically in certain operations under Standalone mode, but not under the SPI mode.

  • Page 65: Playback Operation

    PRELIMINARY ISD1700 SERIES 12.2 LAYBACK PERATION > T PLAY Sp+, Sp- Figure 12.3: Playback Operation for entire message > T PLAY Set1 Sp+, Sp- Figure 12.4: Start and Stop Playback Operation Publication Release Date: Nov 6, 2008 - 65 -...

  • Page 66: Erase Operation

    PRELIMINARY ISD1700 SERIES 12.3 RASE PERATION > T ERASE Figure 12.5: Single Erase Operation with No Sound Effect >T ERASE Sp+, Sp- Figure 12.6: Single Erase Operation with Sound Effect Publication Release Date: Nov 6, 2008 - 66 - Revision 1.31...

  • Page 67: Forward Operation

    PRELIMINARY ISD1700 SERIES 12.4 ORWARD PERATION > T or T Figure 12.7: Forward Operation with No Sound Effect or T Sp+, Sp- Figure 12.8: Forward Operation with Sound Effect Publication Release Date: Nov 6, 2008 - 67 - Revision 1.31...

  • Page 68: Global Erase Operation

    PRELIMINARY ISD1700 SERIES 12.5 LOBAL RASE PERATION ERASE 3x(T Sp+, Sp- Note: If SEs are recorded, then Sp+/- will have output. Figure 12.9: Global Erase Operation with or without Sound Effects 12.6 ESET PERATION RESET Reset Device returns to Power Down state Set2 Figure 12.10: Reset Operation...

  • Page 69: Looping Playback Operation

    PRELIMINARY ISD1700 SERIES 12.7 OOPING LAYBACK PERATION After 2nd Message starts playback PLAY 1st Message 2nd Message (If SE1 recorded) Sp+, Sp- Figure 12.11: Playback Two Consecutive messages Looping playback of 2 consecutive messages until PLAY is released PLAY LS2 or...

  • Page 70: Global Erase Operation To Restore Circular Memory Architecture

    PRELIMINARY ISD1700 SERIES 12.8 LOBAL RASE PERATION TO ESTORE IRCULAR EMORY RCHITECTURE ERASE 3x(T LErr Sp+, Sp- Note: If SEs are recorded, then Sp+/- will have output. Figure 12.13: Global Erase Operation to recover a broken circular memory architecture 12.9...

  • Page 71: Spi Operation

    PRELIMINARY ISD1700 SERIES 12.10 SPI O PERATION SSmin SCKlow SCKhi SCLK MOSI (TRISTATE) MISO Figure 12.15: SPI Operation PARAMETER SYMBOL UNITS nsec Setup Time nsec Hold Time Data in Setup Time nsec Data in Hold Time nsec Output Delay nsec...

  • Page 72: Absolute Maximum Ratings

    PRELIMINARY ISD1700 SERIES 13 ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS (DIE) Condition Value Junction temperature Storage temperature range C to +150 Voltage Applied to any pads - 0.3V) to (V + 0.3V) Power supply voltage to ground potential -0.3V to +7.0V...

  • Page 73: Operating Conditions

    PRELIMINARY ISD1700 SERIES 13.1 PERATING ONDITIONS OPERATING CONDITIONS (DIE) CONDITIONS VALUES Operating temperature range 0°C to +50°C Supply voltage (V +2.4 V to +5.5 V Ground voltage (V Input voltage (V 0 V to 5.5 V Voltage applied to any pins –0.3 V) to (V...

  • Page 74: Electrical Characteristics

    PRELIMINARY ISD1700 SERIES 14 ELECTRICAL CHARACTERISTICS DC P 14.1 ARAMETERS PARAMETER SYMBOL UNITS CONDITIONS Supply Voltage Input Low Voltage -0.3 0.3xV Input High Voltage 0.7xV Output Low Voltage -0.3 0.3xV = 4.0 mA Output High Voltage 0.7xV = -1.6 mA Record Current = 5.5 V, No load,...

  • Page 75: Ac Parameters

    PRELIMINARY ISD1700 SERIES AC P 14.2 ARAMETERS CHARACTERISTIC SYMBOL UNITS CONDITIONS Sampling Frequency Duration Sect. 6.1.2 Rising Time nsec Falling Time nsec [4] [6] Debounce Time 192/F Ramp Up Time 128/F Ramp Down Time 128/F Initial Scan Time after DRN/8/F...

  • Page 76: Typical Application Circuits

    PRELIMINARY ISD1700 SERIES 15 TYPICAL APPLICATION CIRCUITS The following typical applications examples on ISD1700 Series are for references only. They make no representation or warranty that such applications shall be suitable for the use specified. Each design has to be optimized in its own system for the best performance on voice quality, current consumption, functionalities and etc.
  • Page 77 PRELIMINARY ISD1700 SERIES Example #2: Recording using AnaIn input via push-button controls Reset RESET PLAY μ 0.1 F vAlert ERASE 1 K Ω μ 0.1 F μ 0.1 F SCLK ISD1700 MOSI μ 0.1 F μ 0.1 F SSP1 MISO...
  • Page 78 PRELIMINARY ISD1700 SERIES Example #3: Connecting the SPI Interface to a microcontroller Reset RESET PLAY μ 0.1 F vAlert ERASE 1 KΩ μ 0.1 F μ 0.1 F SCLK To uC ISD1700 MOSI μ 0.1 F μ 0.1 F SSP1...

  • Page 79: Good Audio Design Practices

    PRELIMINARY ISD1700 SERIES Example #4: Connecting the ISD1700 with PowerSpeech W567 15.1 UDIO ESIGN RACTICES To ensure the highest quality of voice reproduction, it is important to follow good audio design practices in layout and power supply decoupling. See recommendations from below links or other Application Notes in our websites.

  • Page 80: Ordering Information

    = Plastic Dual Inline Package (PDIP) 240 : 160 – 480 secs When ordering ISD1700 devices, please refer to the above ordering scheme. Contact the local Nuvoton Sales Representatives for any questions and the availability. For the latest product information, please contact the Nuvoton Sales/Rep or access Nuvoton’s worldwide web site at...

  • Page 81: Version History

    PRELIMINARY ISD1700 SERIES 17 VERSION HISTORY VERSION DATE DESCRIPTION October 2006 Initial version January 2007 Revise Rosc resistor value and standby current parameter Update read status command: description & figure May 2007 Update the description on Reset pin Dec 2007...
  • Page 82 Nuvoton customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nuvoton for any damages resulting from such improper use or sales.

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