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IC BLOCK DIAGRAM/ TERMINAL DESCRIPTION
Q551 : AK4103VF DIGITAL AUDIO TRANSMITTER
PIN LAYOUT
V1
1
TRANS
2
PDN
3
MCLK
4
SDTI
5
BICK
6
LRCK
7
FS0/CSN
8
FS1/CDTI
9
FS2/CCLK
10
FS3/CDTO
11
C1
12
PIN / FUNCTION
No. PIN NAME I/O
1
V1
2
TRANS
3
PDN
4
MCLK
5
SDTI
6
BICK
7
LRCK
8
FS0
CSN
AKMODE
9
FS1
CDTI
10
FS2
CCLK
11
FS3
CDTI
12
C1
13
ANS
14
BLS
15
CKS0
16
CKS1
17
VDD
18
VSS
19
TXN
20
TXP
21
DIF0
22
DIF1
23
DIF2
24
U1
BLOCK DIAGRAM
24
U1
23
DIF2
DIF1
22
DIF0
21
2.
TXP
BICK
LRCK
19
TXN
SDTI
VSS
18
17
VDD
16
CKS1
C1
CKS0
15
U1
V1
BLS
14
13
ANS
FS0
FS1
FS2
FS3
I
Validity bit input pin
Audio routing mode (transparent mode) pin at synchronous mode.
I
0: Normal mode, 1: Audio routing mode
I
Power down & reset pin. When "L", the AK4103 is powered-
I
Master clock input pin.
I
Audio serial data input pin.
I/O Audio serial data clock input/ output pin.
I/O Input output channel clock pin.
I
Sampling frequency select 0 pin at synchronous mode.
I
Host interface chip select pin at asynchronous mode.
I
AK4112A: mode pin at audio routing mode.
I
Sampling frequency select 1 pin at synchronous mode.
I
Host interface data input pin at asynchronous mode.
I
Sampling frequency select 2 pin at synchronous mode.
I
Host interface bit clock input pin at asynchronous mode.
I
Sampling frequency select 3 pin.
O
Host interface data output pin.
I
Channel status bit input pin.
I
Asynchronous/synchronous mode select pin. 1: synchronous
I/O Block start input/output pin.
I
Clock mode select 0 pin.
I
Clock mode select 1 pin.
-
power supply pin. 4.75 to 5.25V
-
Ground pin.
O
Negative differential output pin.
O
Positive differential output pin.
I
Audio serial input select 0 pin.
I
Audio serial input select 1 pin.
I
Audio serial input select 2 pin.
I
User data bit input for channel 1.
Prescaler
Audio Serial
Interface
Biphase
Encoder
CRC Generator
Host Serial
Interface
DESCRIPTION
DX-C34
TXP
TXN
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