Ordering Information - Harman Kardon AVR 160 Service Manual

5 x 40w 5.1 channel a/v receiver

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Owner's manual (48 pages)

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Table of Contents

harman/kardon

ESMT

SDRAM

FEATURES

JEDEC standard 3.3V power supply

LVTTL compatible with multiplexed address

Dual banks operation

MRS cycle with address key programs

CAS Latency (2 & 3 )

Burst Length (1, 2, 4, 8 & full page)

Burst Type (Sequential & Interleave)

All inputs are sampled at the positive going edge of the

system clock

Burst Read Single-bit Write operation

DQM for masking

Auto & self refresh

32ms refresh period (2K cycle)

PIN CONFIGURATION (TOP VIEW)

DQ0

DQ1

SSQ

DQ2

DQ3

DDQ

DQ4

DQ5

SSQ

DQ6

DQ7

DDQ

LDQM

CAS

RAS

A10/AP

Elite Semiconductor Memory Technology Inc.

DQ15

DQ14

SSQ

DQ13

DQ12

DDQ

DQ11

DQ10

SSQ

DQ9

DQ8

DDQ

N.C/RFU

UDQM

CLK

CKE

N.C

50PIN TSOP(II)

(400mil x 825mil)

(0.8 mm PIN PITCH)

512K x 16Bit x 2Banks

Synchronous DRAM

GENERAL DESCRIPTION

The M12L16161A is 16,777,216 bits synchronous high

data rate Dynamic RAM organized as 2 x 524,288 words by

16 bits, fabricated with high performance CMOS technology.

Synchronous design allows precise cycle control with the

use of system clock I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst length and programmable latencies allow the same

device to be useful for a variety of high bandwidth, high

performance memory system applications.