Sony ST-S9 Service Manual page 22

ST-S9
QQ
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Pin No. Pin Name
VSS
48
WMD0
49
50 PAGE2
VSS
51
PAGE1, PAGE0
52, 53
BOOT
54
55 BTACT
BST
56
MOD1
57
MOD0
58
59 EXLOCK
VDDI
60
VSS
61
A17, A16
62, 63
64 to 66 A15 to A13
GP10
67
DECODE
68
AUDIO
69
VDDI
70
VSS
71
TE
L 13942296513
72 to 75 D15 to D12
VDDE
76
D11 to D8
77 to 80
VSS
81
A9, A12 to A10
82 to 85
TDO
86
87 TMS
XTRST
88
TCK
89
TDI
90
91 VSS
A8 to A3
92 to 97
D7, D6
98, 99
VDDI
100
101 VSS
102 to 105 D5 to D2
VDDE
106
D1, D0
107, 108
109, 110 A2, A1
VSS
111
A0
112
www
PM
113
SDI3, SDI4
114, 115
.
SYNC
116
117 to 119 VSS
VDDI
120
22
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I/O
—
Ground terminal
I
S-RAM wait mode setting terminal Fixed at "L" in this set
O Page selection signal output terminal Not used (open)
—
Ground terminal
O
Page selection signal output terminal Not used (open)
I
Boot mode control signal input terminal Not used (fixed at "L")
O Boot mode state display signal output terminal Not used (open)
I
Boot trap signal input from the M61512FP (IC607)
I
PLL input frequency select terminal
I
Mode setting terminal
I PLL lock error and data error flag input from the digital audio interface receiver (IC604)
—
Power supply terminal (+2.6V)
—
Ground terminal
O
Address signal output terminal Not used (open)
O Address signal output to the S-RAM (IC602)
L/R sampling clock signal (44.1 kHz) output to the D/A, A/D converter (IC605) and digital filter
O
(IC606)
O
Decode signal output to the system controller (IC501)
I
Bit 1 input terminal of channel status from the digital audio interface receiver (IC604)
—
Power supply terminal (+2.6V)
—
Ground terminal
I/O Two-way data bus with the S-RAM (IC602)
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the S-RAM (IC602)
—
Ground terminal
O
Address signal output to the S-RAM (IC602)
O
Simple emulation data output terminal Not used (open)
I Simple emulation data input start/end detection signal input terminal Not used (open)
I
Simple emulation asychronous break input terminal Not used (open)
I
Simple emulation clock signal input terminal Not used (open)
I
Simple emulation data input terminal Not used (open)
— Ground terminal
O
Address signal output to the S-RAM (IC602)
I/O
Two-way data bus with the S-RAM (IC602)
—
Power supply terminal (+2.6V)
— Ground terminal
I/O
Two-way data bus with the S-RAM (IC602)
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the S-RAM (IC602)
O Address signal output to the S-RAM (IC602)
—
Ground terminal
O
Address signal output to the S-RAM (IC602)
I
PLL reset signal input from the M61512FP (IC607) "L": reset
x ao
y
I
Audio serial data input terminal Not used (fixed at "L")
Synchronous/asychronous selection signal input terminal
i
I
"L": Synchronous, "H": asynchronous (fixed at "H" in this set)
— Ground terminal
—
Power supply terminal (+2.6V)
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8
Description
"L": 384fs, "H": 256fs (fixed at "H" in this set)
"L": single chip mode, "H": use prohibition (fixed at "L" in this set)
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