Sony HDR-HC9 Service Manual page 47

3-9. POWER BLOCK DIAGRAM (2/4)
VC-500 BOARD (2/4)
D_1.0V
A_1.2V
D_1.2V_HV
D_1.2V_K
D_1.5V
D_1.8V
C D_2.5V
D_2.8V
POWER (1/4)
(PAGE 3-8)
A_2.8V
AU_2.8V
D_3.3V
A_4.6V
AU_4.6V
MT_5V
CP_-2.8V
N_3.1V
IC1201
CDS,
A/D
CONVERTER
(2/24)
A
XSYS_RST
XDS_RESET
POWER (1/4)
(PAGE 3-8)
AU_4.6V
4 IN OUT
2.8V REG
IC2904
(12/24)
HDR-HC9/HC9E_L2
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
IC3002
AD/DA
CONVERTER
(13/24)
IC3001
IC3101
VIDEO OUT, HDMI SIGNAL
PROCESSOR TRANSMITTER
AUDIO IN/OUT
(13/24) (14/24)
A_1.2V
D_1.2V_HV
D_1.2V_K
D_1.5V
D_1.8V
D_2.5V
D_2.8V
A_2.8V
N_3.1V
IC1301
IC1701 IC1702
CDS,
CLOCK CAMERA SIGNAL
A/D
GENERATOR PROCESSOR
CONVERTER
(4/24)
(4/24)
(3/24)
X1701
3
IC2902 IC2903
IC2901
MIC VOLTAGE
MIC AMP
CONTROL FOLLOWER
(12/24)
(12/24) (12/24)
D_1.0V
A_1.2V
D_1.2V_HV
D_1.2V_K
D_1.5V
D_1.8V
D_2.5V
D_2.8V
A_2.8V
A_4.6V
CP_-2.8V
IC2701
IC3401
IC3201
HDV STREAM
HDMI HDV/DV i.LINK
PROCESSOR,
INTERFACE
MUX/DEMUX,
(16/24)
(15/24) DV SIGNAL
PROCESSOR
(11/24)
D_1.2V_HV
D_1.2V_K
D_1.5V
D_1.8V
D_2.8V
N_3.1V
IC5201 IC1802
16M EEPROM
SDRAM
(5/24)
(24/24)
IC1901 IC5202
IC1801
256M 32M
CAMERA
SDRAM FLASH
CONTROL
(6/24) (24/24)
(5/24)
XSYS_RST
3-9
A_1.2V
D_1.2V_HV
D_1.5V
D_2.5V
D_2.8V
A_2.8V
IC2401
256M
DDR-SDRAM
(10/24)
BUFFER
Q2101 - Q2107
IC2201
IC2001
IC2402
HDV-MPEG VIDEO
COMPONENT
16M
ENCODER/DECODER,
OUT AMP
FLASH
MPEG AUDIO
(7/24) (10/24)
SIGNAL PROCESSOR
(9/24)
IC5103
OSCILLATOR
DRIVE
(23/24)
IC4401
IC5101 MECHA CONTROL
(18/24)
DS CONTROL,
HI CONTROL
(23/24)
IC2101
BASE BAND SIGNAL
PROCESSOR,
DOWN CONVERTER,
D/A CONVERTER
(8/24)
XREEL_HALL_ON
E
XRST_VTR
POWER (3/4)
CHIME_PWR_CONT
(PAGE 3-10)
XHDMI_DICN
MS_VCC_ON
XSYS_RST
F
LENS_COVER_LED_ON
POWER (4/4)
XRST_IC_5404
(PAGE 3-11)
XRST_IC_5703_CPU
XDS_RESET