Hdmi Circuit Diagram - Toshiba D-R5SC Service Manual
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Also See for D-R5SC:
- Owner's manual (58 pages) ,
- Service manual (33 pages) ,
- Owner's manual (58 pages)
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5-4-3. HDMI Circuit Diagram
+1.8V
+3.3V
FB25
FB26
A12V
A12V
+3.3V
+1.8V
GND
VOGND
VDIFGND
P
O
W
E
R
F
O
R
Q19
+3.3V
R331
2.7K
R333
1K
P
o
w
e
r
f
o
r
A150_VIDO_[0..7]
D
I
G
I
T
A
L
A150_VIDO_HS
V
I
D
E
O
A150_VIDO_VS
A150_VCLKOx2
I
/
F
A150_SPDIFO
I
2
C
A
D
D
R
C
R337
4.7K
A
1
5
0
R338
4.7K
A
1
5
0
R339
4.7K
A
1
5
0
I
2
C
F
O
R
H
D
O
N
L
Y
A
D
D
R
=
0
X
H
D
_
S
C
L
HD_SCL
H
D
_
S
D
A
HD_SDA
SCL
SDA
HDMI_27MHZ_OSC
RESET-
C34
1nF
N.C.
HD_3.3V
HD_1.8V
+3.3V +1.8V
A12V
IC515
L78L05/TO92
3
1
IN
OUT
C354
+
10uF/16V
VDIFGND
VOGND
I
7
7
_
A
V
D
D
T
3
.
3
V
FB28
2SA1955F
HD_AVDDT_3.3V
R332
1K
2N3904
Q20
I
7
7
_
A
V
D
D
T
3
.
3
V
IC516
A
1
5
0
_
V
D I
O
_
0
1
VIN[0]
A
1
5
0
_
V
D I
O
_
1
2
VIN[1]
A
1
5
0
_
V
D I
O
_
2
3
VIN[2]
A
1
5
0
_
V
D I
O
_
3
4
VIN[3]
A
1
5
0
_
V
D I
O
_
4
5
VIN[4]
A
1
5
0
_
V
D I
O
_
5
6
VIN[5]
A
1
5
0
_
V
D I
O
_
6
7
VIN[6]
A
1
5
0
_
V
D I
O
_
7
8
VIN[7]
A
1
5
0
_
V
D I
O
_
H
S
14
HSYNC/I2C_CFG0
A
1
5
0
_
V
D I
O
_
V
S
15
FIELD/I2C_CFG1
A
1
5
0
_
V
C
L
K
O
2 x
11
VCLKx2
A
1
5
0
_
S
P
D
F I
O
22
SPDIF/I2C_CFG2
R336
4.7K
38
GPIO[17]
37
GPIO[16]
23
GPIO[15]
O
N
F
I
G
75
GPIO[14]
77
GPIO[13]
_
V
D I
O
_
H
S
78
GPIO[12]
_
V
D I
O
_
V
S
79
GPIO[11]
_
S
P
D
F I
O
80
GPIO[10]
17
GPIO[9]
18
GPIO[8]
8
A
19
GPIO[7]
20
GPIO[6]
21
GPIO[5]
25
GPIO[4]
35
SCL
36
SDA
43
REFCLK
R345
0R
41
RESET-
HD_+5V
H
D
_
S
C
L
Q21
1
3
R340
1.8K
HD_+5V
C355
2N7002
A12V
C163
+
0.1uF
H
D
_
S
D
A
1
Q22
3
10uF/16V
R342
1.8K
HD_+5V
2N7002
C357
C356
C359
+
+
0.1uF
100uF/25V
100uF/16V
H
D
_
R334
430R_1%
58
CSET
61
VREF
R335
392R_1%
64
RSET
VDIFGND
VOGND
66
1
TP29
Y/G
67
1
TP30
Pr/R
68
1
TP31
Pb/B
H
D
_
V
S
Y
N
C
TP32
73
1
V_SYNC
H
D
_
H
S
Y
N
C
TP33
71
1
H_SYNC
T
M
D
S
_
D
2
+
56
TXDP2
T
M
D
S
_
D
- 2
55
TXDN2
T
M
D
S
_
D
1
+
53
TXDP1
T
M
D
S
_
D
- 1
52
TXDN1
T
M
D
S
_
D
0
+
50
TXDP0
T
M
D
S
_
D
- 0
49
TXDN0
T
M
D
S
_
C
L
K
+
47
TXCP
T
M
D
S
_
C
L
- K
46
TXCN
TP28
39
1
CEC
H
O
T
P
L
U
G
_
O
U
T
R341
0R
32
HOTPLUG
R343
30
GPIO[0]
29
GPIO[1]
28
10K
GPIO[2]
27
GPIO[3]
HD_3.3V
C371
C373
+
100uF/16V
0.1uF
VOGND
VDIFGND
J503
HDMI_TYPE_A
T
M
D
S
_
D
2
+
1
TDMS_D2+
2
TDMS_D2_SHIELD
T
M
D
S
_
D
- 2
3
TDMS_D2-
T
M
D
S
_
D
1
+
4
TDMS_D1+
5
TDMS_D1_SHIELD
T
M
D
S
_
D
- 1
6
TDMS_D1-
T
M
D
S
_
D
0
+
7
TDMS_D0+
8
TDMS_D0_SHIELD
T
M
D
S
_
D
- 0
H
D
M
9
TDMS_D0-
T
M
D
S
_
C
L
K
+
10
TDMS_CLK+
11
TDMS_CLK_SHIELD
T
M
D
S
_
C
L
- K
12
TDMS_CLK-
13
CEC
14
NC
15
SCL
16
SDA
17
DDC/CEC_GND
HD_+5V
18
+5V
H
O
T
P
L
U
G
19
HOTPLUG
VDIFGND
FB27
H
D
_
P
L
L
_
1
8 .
V
FB29
H
D
_
D
A
C
_
3
3 .
V
H
D
_
A
V
D
D
T
_
3
3 .
V
FB30
H
D
_
V
D
F I
_
1
8 .
V
C360
C361
C363
C366
C362
C365
+
+
0.1uF
0.1uF
0.1uF
0.1uF
100uF/16V
100uF/25V
VOGND
VDIFGND
FB31
V
R
E
F
+3.3V
C368
C369
+
47uF/16V
0.1uF
VOGND
FB32
N.C.
FB33
N.C.
3
1
T
M
D
S
_
D
2
+
3
1
4
2
T
M
D
S
_
D
- 2
4
2
ACM2012
ACM2012
FB34
N.C.
FB35
N.C.
T
M
D
S
_
D
1
+
3
1
3
1
T
M
D
S
_
D
- 1
4
2
4
2
ACM2012
ACM2012
H
O
T
P
L
U
G
HD_1.8V
C374
C375
C376
C377
C372
C378
C379
C380
+
0.1uF
0.1uF
0.1uF
0.1uF
47uF/16V
0.1uF
0.1uF
0.1uF
I
O
U
T
HD_3.3V
+1.8V
HD_1.8V
+3.3V
HD_AVDDT_3.3V
+1.8V
T
M
D
S
_
C
L
K
+
T
M
D
S
_
C
L
- K
T
M
D
S
_
D
0
+
T
M
D
S
_
D
- 0
Fig. 5-5-7
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