Philips 20PFL4122/93 Service Manual page 60

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TPS 1.0A LA
Pattern generator for production test
- Supports OSD MUX and alpha blending capability
- Supports blinking and scrolling for closed caption applications
Video Plane
- 2-D video deinterlacer
- Edge-oriented adaptive algorithm for smooth low-angle edges
- MStar 3rd Generation Advanced Color Engine (MStarACE-3) gives:
Brilliant and fresh color
Intensified contrast and details
Vivid skin tone
Sharp edge
Enhanced depth of field perception
Accurate and independent color control
sRGB compliance allows end-user to experience the same colors as viewed on CRTs and other displays
Programmable 12-bit RGB gamma CLUT
3-D video noise reduction for SDTV
Frame rate conversion
Panel Interface
8-bit LVDS/TTL Panel Interface
- Supports dual link LVDS up to SXGA@75Hz
- Supports 8-bit single TTL panel
- Supports 2 data output formats: Thine & TI data mappings
- Compatible with TIA/EIA
- With 6/8 bits options
- Reduced swing for LVDS for low EMI
- Supports flexible spread spectrum frequency with 360Hz~11.8MHz and up to 25% modulation
VGA In
- Support VGA input up to WXGA
- Support fully VESA standards
Component Video In
- Support component video inputs
- Support 480i / 480p / 576i / 576p /720p /1080i/ 1080p
DRAM Controller
- 16-bit data bus for external frame buffer (SDR or DDR DRAM)
- All system clocks synthesized from a single external clock
9. Circuit Descriptions, Abbreviations List and IC Data Sheets