D-Board Block Diagram - Panasonic TH-50PC77U Service Manual

TH-50PX77U / TH-50PE77U

15.24. D-Board Block Diagram

D DIGITAL SIGNAL PROCESSOR
FORMAT CONVERTER
PLASMA AI
SUB-FIELD PROCESSOR
TO A5 D5
RE+(LSB) 1
RE-(LSB) 2
RD+ 3
RD- 4
RCLK+ 6 RA ,RB ,RC ,RD ,RE ,RCLK
RCLK- 7
RC+ 9
RC- 10
RB+ 11
RB- 12
RA+ 14
RA- 15
INEXCH
INEXCH 17
DRVMUTE
DISPEN 18
ALARM
ALARM 19
READY
READY 21
PANEL_STBY_ON 20 Q9044
IIC_DATA1 23 P3V_SDA1
IIC_CLK1 24 P3V_SCL1
IIC_DATA2 26 STB_SDA02
IIC_CLK2 27 STB_SCL02
TXD_PC
29
TXD
D9804
RXD_PC
RXD 30
IIC_CONT/C_SEL 31
D9811
D9802
DCDC_ON
IIC_CONT
P15V_MOTO
P15V
TO P25 D25
+15V 1
+15V 2
P5V
+5V 5
STB5V_M
+5V 6
STBY5V 9
PANEL_MAIN_ON
PANEL_MAIN_ON 11
SOS4_PS
SOS4_PS 12
VDATA_DET
VDATA_DET 13
FOR
FACTORY STB3.3V
D6
USE
STBY3.3V 1
IIC_CONT
IIC_CONT 2
SCL1 4 P3V_SCL1
SDA1 5 P3V_SDA1
SCL2 6 STB_SCL02
SDA2 7 STB_SDA02
TXD_PC
TXD 8
RXD_PC
9
RXD
IIC_INT
IIC_INT 10
PSTB 11
PBUSY 12
PDB0 13
PSLCT 14
PDB1 15
LED_G
LED_G 16
LED_R
LED_R 17
REMOCON
REMOCON 18
STB5V_M
STBY5V 19
P15V
P15V 21
TH-50PX77U/PE77U
D-Board Block Diagram
IC9900
FORMAT CONVERTER/RGB PROCESSOR
PICTURE
P1.2V
OUTPUT
R 10bit
R0-R9
G 10bit I/P
FORMAT
P2.5V G0-G9
CONVERTER
B 10bit CONVERTER
B0-B9
P3.3V
SFRST
SFVRST
LATCH
VD VD
FPCLK
HD HD
FPDAT0
DCK DCK JTAG FPDAT1
TDO,TDI
TMS,TCK
LVDS INPUT
LVDS
JTAG DISCHARGE
Low
CONTROL
Voltage
Differential (LSI58 COMM)
Signaling
RECEIVER
IC9500
FPGA
LVDS RECEIVER
SYNC PROCESSING
CONTROL WB ADJ
DISCHARGE CONTROL
INEXCH FLASH CONTROL
NCS_FPGA FPGA CONTROL
DATA0
OSD
IIC
ASDIO
DCLK
NCS
IC9011
STB5V STB 3.3V/RESET STB3.3V
4 VDD VOUT 3
STB3.3V_ON
Q9046
6 CE RESET 1
STB3.3V
1 NCS
DATA IC9007 IC9013
2
STB_SDA02
5 ASDI
P3V_SCL02
PROM(FPGA) STB_SCL02
IIC SWITCH
6 DCLK
P3V_SDA02
14 VCC
1
P3V_SCL01
3 2
IC9002
4
DIGITAL
P3V_SDA01 6 5
TEMPERATURE
10
SENSOR
8 9
P3V_SCL02
5 A1 SCL 1
13
P3V_SDA02
3 A0 SDA 6 11 12
IC9805 IC9806
DC-DC CONVERTER
DC-DC CONVERTER
P15V
15V->1.2V,15V->3.3V 15V->2.5V
VB1_5V
27 17 21 10
CB1 CB2 VB FSW
30 OVP 16 VB
VCC 23
18 OUT2-1 21 CB
OUT1-1 26
P15V
20 13
OUT2-2 OUT1-2 24 VDD
G2 S2 G1 S1 G2 S2 G1 S1
19 LX2 25
LX1
D2 D2 D1 D1 D2 D2 D1 D1
8 -INC2 8 CTL
-INC1 7
Q9808 Q9807
P1.2V
VO1 3
P3.3V
12 VO2
11 FB2 FB1 4
CTL
16
Q9805
DCDC_ON
PD1-Mplus
PLASMA AI/SUB FIELD PROCESSOR/PEAKS DATA DRIVER
CTI/TINT
R 10bit
COLOR
SUB-FIELD
CONTRAST NEW
G 10bit
WB-ADJ PLASMA AI PROCESSOR
B 10bit
st-r
XRST
PCK OCK SCL SDA
P3.3V
P3V_SCL02
60MHz XRST
14 CLK5
P3V_SDA02 IC9502
36.6MHz X9200
4 CLK9 XT 1
IC9200
20MHz
RESET
13 CLK6
P3.3V
84MHz XTN 20
CLOCK GENE.
12 CLK7
5 VCC
CLKM PRCKI
-IN (FREE_RUN) ROMDATA00-03
FLASH
ROMDATA04-07/ROMADDRESS00-20,-1,CE,OE,WE,BYTE
CONTROL
Control DATA 10bit ODED1,ODED2,CLRD1,CLRD2,PCD1,PCD2,PCD3,PCD4,LED1,LED2
DATA DRIVER
Sustain Control DATA 7bit UMH,UML,USH,USL,UEH,NUEL(URH)
FPGA SS PULSE
CONTROL
Scan Control DATA 16bit OC1,OC2,CLK,SIU,SID,SCSU,CPH1,CPH2,(LAT),CEL,(CBK)CSL,CSH,CML,CMH,SC_DRV_RST
SCAN OUT
SC PULSE
DRV_RST
RESET NRST
DRVMUTE
Q9050 1 LSI_RST
IC9001
72 RESET OSD_CLK
XRST 2 XRST OSD_HD 21
32k EEPROM
OSD_VD 20
5 SDA 7 35 EEP_WR_CTL
WP
IC9003
6 SCL
MICOM
OSD_YS
STB_SCL01
50
IIC1_SCL
STB_SDA01
49 IIC1_SDA
STB_SCL02
33 IIC2_SCL
DRVRST
STB_SDA02
32 IIC2_SDA
26 ASDIO
27 DCLK
28 DATA0
29 NCS
52 NCS_FPGA
LVDSBIT
INEXCH
SOS9_CONF 10
42 INEXCH
ALARM
37 ALARM
READY
36 READY
TXD_PC
70 TXD1
RXD_PC
69 RXD1
IIC_CONT
P15V
71 IIC_CONT
SOS7_SC2 93
43 IIC_CONT
VDATA_DET SOS8_SS
VCC 17
84 VDATA_DET
PANEL_MAIN_ON SOS6_SC1
100 PANEL_MAIN_ON
OUT1 20
SOS4-PS
92 SOS4-PS
15 LED_G
OUT2
53 LED_G
LED_R
G2 S2 G1 S1 SOS5_5V
54 LED_R
LX 19
D2 D2 D1 D1 REMOCON
Q9010 34 REM_IN
-INC 12
SOS3_3V
Q9809
SOS2_15V
VO 23
P2.5V
7
P_ON/OFF
FB 24
Q9806
80
P1.2V P2.5V P3.3V
IC9901
DDR SDRAM(128M)
P2.5V
DRVCLKU0-U3
Video DATA 59bit(UA00-UC04,DA00-DC13,DB14,DC14)
DATA
ROMDATA04-15, 3bit
DRIVER ROMADDRESS00-20 (UA05-UC15)
ROMDATA00-03 (DA14,DA15-DC15)
DRVCLKD0-D3
IC9303
P3.3V
16/32M FLASH MEMORY
CE,OE,WE,BYTE
DQ4-DQ15
VOUT 4 RESET
A0-A19
DQ0-DQ3
30bit
(DA00-DC09)
DRVCLKD0
DRVCLKD1
DRVCLKD2
DRVCLKD3
LED1
PCD1
PCD2
ODED1
CLRD1
TP9100
TP9010
Q9302 Q9301
OSD_CLKO
23
TP9101
OSD_HO
OSD_VO LED2
OSD_R PCD3
OSD_R 19
PCD4
OSD_G
OSD_G 18
ODED2
OSD_B
OSD_B 17
CLRD2
OSD_YS
16
DRVCLKU0
DRVCLKU1
XIN
67
X9000 DRVCLKU2
XOUT 66 9.216MHz
DRVCLKU3
32bit
3
(UA00-UC05,DA10-DC13,DB14,DC14)
4bit
(DA14,DA15-DC15)
STB3.3V
FVSEL
FVSEL 30
LVDSBIT
5
SOS9_CONF
IC9802,03
LEVEL CONVERTER P5V
3.3V->5V
SOS7_SC2
SOS8_SS
91
SOS6_SC1
90
SC_DRV_RST
P5V
SOS6_SC1
SOS7_SC2
85 Q9054 Q9053
STB3.3V
P15V
P15V_MOTO
86
Q9052 Q9051
87
P3.3V
P+15V SOS / LED BLINKING : 2TIMES
P+3.3V SOS / LED BLINKING : 3TIMES
P+5V SOS / LED BLINKING : 5TIMES
D31 TO C11
14 DOUTDA12
40 DOUTDC21
3 CLK0P_C1
5 CLK1N_C1
42 CLK2P_C1
44 CLK3N_C1
46 LE_C1
47 PC1_C1
48 PC2_C1
49 ODE_C1
50 CLR_C1
P5V
53
P5V
55
1 5VDET
D32 TO C21
P5V
1
P5V
3
5 LE_C2
6
PC3_C2
7
PC4_C2
8 ODE_C2
9 CLR_C2
11 CLK0P_C2
12 CLK1N_C2
56 CLK2P_C2
58 CLK3N_C2
14 DOUTDA0
54 DOUTDC11
60
SUSTAIN
DATA
66
68 SS_SOS8
P5V
D20 TO SC20
1 P5V
2
12 SCAN
DATA
14
18
19
22
26
20 SC_DRV_RST
15 SC_SOS6_SC1
16 SOS7_SC2
28 +15V
29 +15V
30 +15V
TH-50PX77U/PE77U
D-Board Block Diagram