Ic703 (An8739Sbe2) Focus Coil/ Tracking Coil/ Traverse Motor/Spindle Motor Driver; Ic600 (M38199Mf227) System Microprocessor - Panasonic SA-AK18 Service Manual
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Also See for SA-AK18:
- Service manual (120 pages) ,
- Wiring diagrams (40 pages) ,
- Operating instructions manual (32 pages)
Table of Contents
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No.
Mark
I/O
52
EFM
53
PCK
54
VCOF2
I/O
55
SUBC
56
SBCK
57
VSS
58
X1 IN
59
X2 OUT
60
VDD
61
BYTCK
62
/CLDCK
63
FCLK
64
IPFLAG
65
FLAG
13.3. IC703 (AN8739SBE2) Focus coil/ Tracking coil/ Traverse motor/
Spindle motor driver
No.
Mark
I/O
1
/RST
-
2
NC
-
3
IN2
I
4
PC2
I
5
NC
-
6
IN1
I
7
NC
I
8
PVCC1
I
9
PGND1
-
10
NC
-
11
D1-
O
12
D1+
O
13
D2-
O
14
D2+
O
13.4. IC600 (M38199MF227) System Microprocessor
No.
Mark
1
CRT/SER 4
2
TPS
3
DECK 1
4
DECK 2
5
KEY 4
6
KEY 3
7
KEY 2
Function
-
EFM signal output
-
PLL extraction clock output
(fPCK = 4.321 MHz during
normal playback)
VCO Loop filter for 33.8688
MHz conversation terminal for
16.9344 MHz crystal mode,
must use other circuit
O
Sub-code serial data output
I
Clock
input
for
sub-code
serial data
I
GND
I
Crystal oscillating circuit input
(f = 16.9344MHz)
O
Crystal oscillating circuit input
(f = 16.9344 MHz)
I
Power
supply
input
oscillating circuit)
-
Byte clock output
-
Sub-code frame clock signal
output (fCLDCK = 7.35 kHz
during normal playback)
-
Crystal frame clock signal
output (fCLK = 7.35 kHz,
double = 14.7 kHz)
-
Interpolation flag output ("H" :
Interpolation)
-
Flag output
Function
RESET output terminal
N.C.
Motor Drive (2) input
Turntable motor drive signal
(L : "ON")
N.C.
Motor driver (1) input
N.C.
Power supply (1) for driver
Ground connection (1) for driver
N.C.
Motor driver (1) reverse-action
output
Motor driver (1) forward-action
output
Motor driver (2) reverse-action
output
Motor driver (2) forward-action
output
I/O
Function
I/O
CRT Timer/ (SP_LTH) latch
signal for ASP
I
Tape Mecha TPS input
I
Tape Mecha condition input
(HALF 1/ MODE/ PHOTO
1/PHOTO 2)
I
Tape Mecha condition input
(HALF 2/ RECI_F/ MODE/
RECI_R)
I
Key 4 input
I
Key 3 input
I
Key 2 input
No.
Mark
66
CLVS
67
CRC
68
DEMPH
69
RESY
70
IOSEL
71
/TEST
72
AVDD1
73
OUTL
74
AVSS1
(for
75
OUTR
76
RSEL
77
IOVDD
78
PSEL
79
MSEL
80
SSEL
No.
Mark
15
D3-
16
D3+
17
D4-
18
D4+
19
NC
20
PGND2
21
PVCC2
22
NC
23
VCC
24
VREF
25
IN4
26
IN3
27
RSTIN
28
NC
No.
Mark
8
KEY 1
9
SER 1
10
SER 2
11
SER 3
12
SER 5
13
SPE
14
V_JOG_AB
23
I/O
Function
-
Spindle
servo
synchronizing signal output
("H" : CLV, "L" : rough servo)
-
Sub-code
CRC
output ("H" :OK, "L" :NG)
-
De-emphasis
ON
output ("H" :ON)
-
Frame re-synchronizing signal
output
I
Mode switching terminal
I
Test input
I
Power
supply
input
analog circuit)
O
Left
channel audio
output
I
GND
O
Right channel audio signal
output
I
RF signal polarity assignment
input
(at "H" level, RSEL="H", at "L"
level, RESL="L")
I
5V supply input
I
Test terminal (connected to
Gnd)
I
SMCK oscillating frequency
designation input ("L" :4.2336
MHz, "H" :8.4672 MHz)
I
SUBQ output mode select
("H" :Q-code buffer mode)
I/O
Function
O
Motor driver (3) reverse-action
output
O
Motor driver (3) forward-action
output
O
Motor driver (4) reverse-action
output
O
Motor driver (4) forward-action
output
-
N.C.
-
Ground connection (2) for driver
I
Power supply (2) for driver
-
N.C.
I
Power supply terminal
I
Reference voltage input
I
Motor driver (4) input
I
Motor driver (3) input
I
Reset terminal
-
N.C.
I/O
Function
I
Key 1 input
O
Serial Data/Clock (D_CLK,
F_CLK)
O
Serial Data/Clock (MKDATA,
D_DAT)
O
Serial Data/Clock (F_DAT,
SP_DAT)
O
Deck
Control/ASP
output (MKCLK, SP_CLK)
I
Speana input
I
Volume jog A-D detection
input
SA-AK18
phase
checked
signal
(for
signal
Clock
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