Sony HDR-PJ260 Service Manual page 13

4-5. POWER BLOCK DIAGRAM (1/3)
VC-653 BOARD (1/3)
J901
DC JACK
CN1008
DC IN
ACV_UNREG_CN
2
BATT/XEXT_CN
3
ACV_GND
1
BATTERY
TERMINAL
BATT_UNREG_CN
+
4
BATT_SIG
5
S BATT_GND
D4101
6
–
Q4101, Q4102
BATTERY CHARGE
SWITCH
BATT/XEXT_CN
BATT_SIG
MAIN_UNREG
IC9101
USB POWER
MANAGEMENT
(13/13)
OUT1
BUILT-IN
OUT2
USB CABLE
CN9101 Q9102
F008
USB_VCC_STD
USB VBUS
1 A5 VB1
SWITCH REG33
CHARGE
A6 VB2
A5 NVP
F500
VCC
IC9104
USB SWITCH
CN9102
(13/13)
CN9102
USB_VCC
1 1 1D+ 2D+
(USB)
VCC
D+
IC9105
CURRENT LIMITER
(13/13)
EN
6 OUT
FAULT
IN
IC9103
USB SWITCH
(13/13)
USB_VCC
08
HDR-PJ260/PJ260E/PJ260V/PJ260VE/XR260E/XR260V/XR260VE_L3
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
Q4103
ACV/BATT SELECT SWITCH
F003
CORE_UNREG
F004
I/O_UNREG
F005
MT_UNREG
F001
ACV_UNREG
F002
IC4801
HI CONTROL,
LANC INTERFACE
(12/13)
INIT_CHARGE_ON
F10 O_INIT_CHARGE
Q4801
DC JACK PUI_BATT_XEXT
C7
DETECT
A4
XPUIO_BATT_SIG
BATT_UNREG_SENSE
D9103 XO_CS_DDCON
A1
A2
D9101
UNREG_IN_DET
C4
O_LDO1.2_ON
D_2.8V O_LDO1.8_ON
B2
EVER_3.0V
B1
IC9102
SMART POWER
SELECTOR
(13/13)
VOUT E4
A1 VBUS1
BATT D4
A2
VBUS2
D9102
A3 ISNS
SW2 D5
A5 VBUSLIMIT
L9101
3
SW1 B5 O_SYS_DD_ON
SYS_DD_ON_IC_4302
J_5.0V
10
USB_VBUS
8
Q9107
XBUS_DET_STD_A
XO_CS_IC_4302
XO_LANC_IC_ON
XPUI_LANC_PWR_ON
VBUS_EN
3
VBUS_XOVR_CUR
I_BATT_IN
4
J_5.0V
1
DETECT
Q9103
XVBUS_DET
E1 LX1a
PVDD1a D1
LX1b
E2 PVDD1b D2
FB1
D3
LX2 B8
C8 PVDD2
LDO1_SOURCE A6
ACV_ON FB2 C5
BATT_ON
A1 PVDD3a LX3a A2
B1 LX3b B2
PVDD3b
FB3 C4
LD02_SOURCE B4
LX4
H6 PVDD4 H7
FB4 E4
H5 PVDD5a LX5a H4
G5 PVDD5b LX5b G4
H2 PVDD_CP FB5 E3
B7 AVDD
IC4301
MAIN_UNREG_SENSE
DC/DC CONVERTER
(11/13)
CP_OUT G2
LX6a
E8
D8 PVDD6a
LX6b E7
D7 PVDD6b
FB6 D5
XCS_DD
G1 G6 CS
FR_EVER_
FR_EVER_SI/SO/SCK
SI/SO/SCK
F5 DD_ON
LDO1_ON
D6 LDO1_OUT A5
D3 LDO1_ENB
LDO2_ON
A4
C4 E5 LDO2_ENB LDO2_OUT
IC4302
DC/DC CONVERTER,
LANC DRIVER
(11/13)
E6 VTR_UNREG
PVDD_LDO1
A4 PVDD_LP02
FR_EVER_SO/SCK
LDO1_OUT
DD_ON LDO1_FB
F2 LDO1_ON
C1
SYS_DD_ON_IC_4302
F1 D2
DD_ON LDO2_OUT
Q4805
LDO2_ON
ACV
A4
PVDD_LP02
DETECT
LOAD_IN
ACV_ON
E2 ACV_ON LOAD_OUT
BATT_ON
D1 BATT_ON LOAD_ON
XCS_IC_4302
K9 E3 CS LANC_DC
XLANC_ON
VCH
H2 C2 XLANC_ON
XLANC_PWR_ON
C1 C4 XLANC_PWR_ON
EVER_
.3.0V
BATT_IN
A7 E4
UNREG_IN
VOUT
F5
VuC
F6
UNREG_IN_DET
F2 UNREG_IN_DET
Q4304
BATT_UNREG_SENSE
BATT
E1 BATT_UNREG
4-5
L4301
CH1_OUT
L4302
CH2_OUT
L4303
CH3_OUT
L4304
CH4_OUT
L4305
CH5_OUT
IC4304
B+ SWITCH
(11/13)
D_3.3V
1 VIN TE0_VCC
SD_PWR_ON VOUT 5
3 EN
IC_4301_CP_OUT
A_5.0V
MT_5.0V
L4306
CH6_OUT J_5.0V
IC4303
DC/DC CONVERTER
(11/13)
F007
MT_5.0V
BL_H
6 VIN
VOUT 5
L4307
BL_L
1 LX FB 3
LCD_CABC_PWM
4 EN
HB_1.2V
HB_1.8V
D_1.2V
B1
A_1.125V
A1
A_1.125V_SENSE
B2
HDMI_5V
A3
A5
B6
MSX_3.3V
A6
MS_PWR_ON
B5
LANC_DC
D6
BATT_LI_3V
F4
EVER_3.0V
F4
IC1301
SD_PWR_ON
(1/2)
AF10 FRC_RTG_IN1
LCD_CABC_PWM
Y10 LCD_CABC_PWM
CPU,
AV SIGNAL PROCESS,
MS_PWR_ON LENS CONTROL,
GPIO_S__6
P24
MODE CONTROL,
HDMI PROCESS
USB_VBUS
AJ20 USB_VBUS
(2/13 - 4/13)
VBUS_EN
AE21 VBUS_EN BRK2B
VBUS_XOVR_CUR
R25 GPIO_S__2
XBUS_DET_STD_A
T25 GPIO_SB__5
GPIO_S__4
XBUS_DET
R26 GPIO_S__1
A_VID_1.1V
D_VID_1.1V
CAM_1.2V
D_1.2V
A_1.8V
D_1.8V
EP_2.8V
A_2.8V
AU_2.8V
D_2.8V
A_3.3V
D_3.3V A
MEDIA_3.3V
POWER (2/3)
(PAGE 4-6)
Q4303
TE1_VCC
MEDIA_3.3V
REG
TE0_VCC
Q4301,
VOLTAGE
Q4302 CONTROL
A_5.0V
MT_5.0V
BL_H,BL_L
HB_1.2V
HB_1.8V
A_1.125V
HDMI_5V
MSX_3.3V
LANC_DC
BATT_LI_3V
EVER_3.0V
HB_1.2V
HB_1.8V
HDD Model
SATA_PWR_ON
B15
IM Model
MMC_PWR_ON1
P26