Principles Of Operation - Realistic trc-448 Service Manual

40 - channel mobile transceiver
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PRINCIPLES OF OPERATION
This section of the Service Manual will give you a brief technical description of unique or special circuits
which you might otherwise not understand, notice or be able to troubleshoot
,
.
PLL CIRCUIT
The TRC-448 uses a Digital Phase Lock Loop circuit to synthesize each of the channel frequencies. The
PLL Circuit consists of a reference crystal oscillator (10.24 MHz), reference divider, programable divider,
crystal oscillator, Phase Detector, Low Pass Filter (LPF) and a Voltage Controlled Oscillator (VCO, which
uses a varicap diode as the frequency control source).
Refer to the AM and USB Block Diagram as you go through the following description. A 10.24 MHz
Crystal is used as a reference frequency. The crystal is connected between Pin 4 and 5 of the PLL IC IC-2.
Crystal oscillator Q10 produces a 33.4875/3 MHz frequency signal. This signal is processed through Q11
tripler and mixed by IC-1 mixer with the Q5 VCO frequency (34.7675 to 35.2075 MHz). The resulting
down-mix produces signals of 1.28 through 1.72 MHz, which pass through LPF, and Q12 amplifier and
then applied to Pin 3 of PLL IC IC-2. These frequencies are divided by "N" ,(128 through 172) as
determined by the Channel Selector switch. Thus the output is 10 kHz (divided internally by IC-2).
Also, the reference oscillator frequency, 10.24 MHz, is divided by 1024 (again, internally by IC-2) resulting
in another 10 kHz frequency.
These two 10 kHz signals are fed to the Phase Detector and AFC. An error voltage is generated by the
Phase Detector which is in proportion to the phase difference between these two 10 kHz signals. This error
voltage appears at Pin 7. The AFC circuit brings the VCO to within the lock range of the Phase Detector.
The AFC output is a tri-state output that is open when the circuit is in phase lock, provides positive going
pulses when the VCO frequency is lower than the reference frequency and provides negative going pulses
when the VCO frequency is higher than the reference frequency. This error voltage appears at Pin 1. The
error voltage which appears at Pin 7 and 1 are the result of the phase difference, plus effects of harmonics
and extraneous noise. These error voltages pass through the LPF, where the error voltage is integrated and
harmonics and noises are filtered out. The resulting DC voltage is applied to the VCO (a varicap diode)
whose capacity varies with applied DC voltage. With proper circuit design and precise adjustments, the
VCO frequency is accurate and precise. When the Phase Detector senses no frequency or phase difference
between the two 10 kHz signals, the system is `locked" and the VCO generates a frequency which is as
accurate and stable as the reference crystal oscillator.
The Channel Selector switch provides a Binary Code output which is connected to Pins 9 through 16. The
resulting code determines "NV', the divisor which produces the required output frequency for each channel
(precisely spaced 10 kHz apart).
For AM Receive Mode, crystal oscillator Q9 generates a frequency of 33.485/3 MHz. This signal is also
processed through Oil tripler and mixed in IC-1 mixer with the Q5 VCO frequency (34.765 to 35.205
MHz). The resulting down-mix produces 1.28 through 1.72 MHz frequencies which are supplied to Pin 3 of
IC-2. Thus, the circuit functions in the same way, except for the method of deriving the required 1.28
through 1.72 MHz stepped frequencies.
For LSB, crystal oscillator Q10 generates a frequency of 33.4875/3 MHz. This signal is processed through
Q11 tripler. Carrier oscillator Q1 produces a 7.8025 MHz signal. This signal is processed through Ti and T2
Band Pass Filter, tuned to the 2nd harmonic (15.605 MHz) and mixed in Q3 mixer with the Q4 VCO
frequency (19.1625 to 19.6025 MHz). The resulting up-mix produces 34.7675 through 35.2075 MHz
which pass through BPF and mixed in IC-1 mixer with the 33.4875 MHz. The resulting down-mix produces
the 1.28 through 1.72 MHz frequencies which are supplied to Pin 3 of IC-2. Thus, the circuit functions in
the same way, except for the method of deriving the required 1.28 through 1.72 MHz stepped frequencies.
--6-

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