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RX-V471/HTR-4064
Pin
Port Name
No.
129 D12/IIO0_4/IIO1_4/P1_4
130 D11/IIO0_3/IIO1_3/P1_3
131 D10/IIO0_2/IIO1_2/P1_2
132 D9/IIO0_1/IIO1_1/P1_1
133 IIO0_0/IIO1_0/D8/P1_0
134 AN0_7/D7/P0_7
135 AN0_6/D6/P0_6
136 AN0_5/D5/P0_5
137 AN0_4/D4/P0_4
138 P19_1
139 WR3/BC3/P11_4
140 P19_0
IIO1_3/N_RTS8/N_CTS8/WR2/
141
CS3/P11_3
142 IIO1_2/RXD8/CS2/P11_2
143 IIO1_1/CLK8/CS1/P11_1
144 IIO1_0/TXD8/CS0/P11_0
145 P18_7
146 P18_6
147 P18_5
148 P18_4
149 P18_3
150 P18_2
151 AN0_3/D3/P0_3
152 AN0_2/D2/P0_2
153 AN0_1/D1/P0_1
154 AN0_0/D0/P0_0
IIO0_7/N_RTS6/N_CTS6/N_SS6/
155
AN15_7/P15_7
156 IIO0_6/CLK6/AN15_6/P15_6
IIO0_5/RXD6/SCL6/STXD6/
157
AN15_5/P15_5
IIO0_4/TXD6/SDA6/SRXD6/
158
AN15_4/P15_4
IIO0_3/N_RTS7/N_CTS7/AN15_3/
159
P15_3
160 IIO0_2/RXD7/AN15_2/P15_2
161 IIO0_1/CLK7/AN15_1/P15_1
162 VSS
163 IIO0_0/TXD7/AN15_0/P15_0
164 VCC
165 KI3/AN_7/P10_7
166 KI2/AN_6/P10_6
167 KI1/AN_5/P10_5
168 KI0/AN_4/P10_4
169 AN_3/P10_3
170 AN_2/P10_2
171 AN_1/P10_1
172 AVSS
173 AN_0/P10_0
174 VREF
175 AVCC
176 STXD4/SCL4/RXD4/ADTRG/P9_7 TU_SCL
68
Function Name
POWER
(P.C.B.)
ON
D[12]
B
D[11]
B
D[10]
B
D[9]
B
D[8]
B
D[7]
B
D[6]
B
D[5]
B
D[4]
B
SV_DET
I
EEP_N_CS
O
HP_N_DET
I
FPGA_N_CS
B
EEP_MISO
I
EX_CLK
O
EX_MOSI
O
(no use)
O
VDEC_N_RST
O
(no use)
O
DAC_N_CS
O
DIR_N_CS
O
F_HEQ_CE
O
D[3]
B
D[2]
B
D[1]
B
D[0]
B
PS1_PRT
I
PS2_PRT
I
DOCK1_ID
I
THM2
I
THM1
I
DSP_MISO
I
DSP_CLK
O
VSS
DSP_MOSI
O
VCC
AMP_OLV
I
DC_PRT
I
L3_DET
I
DEST
I
MODEL
I
KY_AD2
I
KY_AD1
I
AVSS
TU_N_RST
O
VREF
AVCC
O
I/O
Detail of Function
OFF
I
External bus
I
External bus
I
External bus
I
External bus
I
External bus
I
External bus
I
External bus
I
External bus
I
External bus
I
S-video detect
O
EEPROM chip select
O
Headphone detection
O
External bus
O
EEPROM reception data
O
FLD/EEPROM communication clock
O
FLD/EEPROM transmission data
O
Unconnected
O
Video decoder reset
O
Unconnected
O
DAC chip select
O
DIR chip select
O
Front HDMI EQ chip enable
I
External bus
I
External bus
I
External bus
I
External bus
I
Power supply protection 1
I
Power supply protection 2
I
Dock1 ID detection
O
Temperature detection 2
O
Temperature detection 1
I
DSP/DIR/DAC reception data
O
DSP/DIR/DAC communication clock
---
O
DSP/DIR/DAC transmission data
---
I
Amplifier output level detection
I
DC protection
I
D terminal L3 detection
O
Destination discrimination
O
Model discriminate
O
Key 2
O
Key 1
---
O
Tuner reset
---
---
O
Tuner I2C clock
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