Motorola HT Series Detailed Service Manual page 18

xvi List of Figures
Figure 9-253.800 MHz Complete Controller..................................................................9-429
Figure 9-254.800 MHz Controller ASFIC/ON_OFF .......................................................9-430
Figure 9-255.800 MHz Controller Microprocessor ........................................................9-431
Figure 9-256.800 MHz Controller Memory ....................................................................9-432
Figure 9-257.800 MHz Controller Audio Power Amplifier..............................................9-433
Figure 9-258.800 MHz Controller Interface ...................................................................9-434
Figure 9-259.800 MHz Controls and Switches Schematic Diagram..............................9-435
Figure 9-260.800 MHz Receiver Front End Schematic Diagram ..................................9-436
Figure 9-261.800 MHz Receiver Back End Schematic Diagram...................................9-437
Figure 9-262.800 MHz Synthesizer Schematic Diagram ..............................................9-438
Figure 9-263.800 MHz Voltage Controlled Oscillator Schematic Diagram ...................9-439
Figure 9-264.800 MHz Transmitter Schematic Diagram...............................................9-440
Figure 9-268.PassPort Trunking Controller PCB Board Side 1 & 2 ..............................9-445
Figure 9-269.PassPort Controller Schematic Diagram .................................................9-446
Figure 9-270.900 MHz (896-941 MHz) Main Board Top Side PCB 8485910Z01 .........9-447
Figure 9-271.900 MHz (896-941 MHz) Main Board Bottom Side PCB 8485910Z01 ....9-448
Figure 9-272.900 MHz Complete Controller..................................................................9-449
Figure 9-273.900 MHz Controller ASFIC/ON_OFF .......................................................9-450
Figure 9-274.900 MHz Controller Microprocessor ........................................................9-451
Figure 9-275.900 MHz Controller Memory ....................................................................9-452
Figure 9-276.900 MHz Controller Audio Power Amplifier..............................................9-453
Figure 9-277.900 MHz Controller Interface ...................................................................9-454
Figure 9-278.900 MHz Controls and Switches Schematic Diagram..............................9-455
Figure 9-279.900 MHz Receiver Front End Schematic Diagram ..................................9-456
Figure 9-280.900 MHz Receiver Back End Schematic Diagram...................................9-457
Figure 9-281.900 MHz Synthesizer Schematic Diagram ..............................................9-458
Figure 9-282.900 MHz Hear/Clear Schematic Diagram ................................................9-459
Figure 9-283.900 MHz Voltage Controlled Oscillator Schematic Diagram....................9-460
Figure 9-284.900 MHz Transmitter Schematic Diagram ...............................................9-461
Figure 9-270.900 MHz Main Board Top Side PCB 8471203M01 .................................9-465
Figure 9-271.900 MHz Main Board Bottom Side PCB 8471203M01 ............................9-466
Figure 9-272.900 MHz Complete Controller..................................................................9-467
Figure 9-273.900 MHz Controller ASFIC/ON_OFF .......................................................9-468
Figure 9-274.900 MHz Controller Microprocessor ........................................................9-469
Figure 9-275.900 MHz Controller Memory ....................................................................9-470
Figure 9-276.900 MHz Controller Audio Power Amplifier..............................................9-471
Figure 9-277.900 MHz Controller Interface ...................................................................9-472
Figure 9-278.900 MHz Controls and Switches Schematic Diagram..............................9-473
Figure 9-279.900 MHz Receiver Front End Schematic Diagram ..................................9-474
Figure 9-280.900 MHz Receiver Back End Schematic Diagram...................................9-475
Figure 9-281.900 MHz Synthesizer Schematic Diagram ..............................................9-476
Figure 9-282.900 MHz Hear/Clear Schematic Diagram ................................................9-477
Figure 9-283.900 MHz Voltage Controlled Oscillator Schematic Diagram....................9-478
Figure 9-284.900 MHz Transmitter Schematic Diagram ...............................................9-479