Download Print this page

Samsung SGH-X495 Service Manual page 8

Samsung mobile phone service manual
Hide thumbs Also See for SGH-X495:

Advertisement

Circuit Description
The hardware sequencer built in this device allows playing of the complex music without giving excessive load to the
CPU of the portable telephones.
For the purpose of enabling YMU788 to demonstrate its full capabilities, Yamaha purpose to use "SMAF:Synthetic music
Mobile Application Format" as a data distribution format that is compatible with multimedia. Since the SMAF takes a
structure that sets importance on the synchronization between sound and images, various contents can be written into it
including incoming call melody with words that can be used for training karaoke, and commercial channel that combines
texts, images and sounds, and others. The hardware sequencer of YMU788 directly interprets and plays blocks relevant to
synthesis (playing music and reproducing ADPCM with FM synthesizer) that are included in data distributed in SMAF.
2-2-8. Memory
Signals in the OM6359 enable two memories. They use two volt supply voltage, VDD3 in the PCF50601 & VDD_1.9V
with a LDO. This system uses Intel's memory, RD38F3050LOZTQ0. It is consisted of 128M bits flash NOR memory and
64M bits SRAM. It has 16 bit data line, HD[0~15] which is connected to OM6359. It has 26 bit address lines,
HA[1~26]. NCSFLASH & NCSRAM signals are chip select. Writing process, HWR_N is low and it enables writing
process to flash memory and SRAM. During reading process, HRD_N is low and it enables reading process to flash
memory and SRAM. Reading or writing procedure is processed after HWR_N or HRD_N is enabled.
2-2-9. OM6359
OM6359 is consisted of ARM core and DSP core. It has 8x1Kword on-chip program/data RAM, 55 Kwords
on-chip program ROM in the DSP. It has 4K*32bits ROM and 2K*32bits RAM in the ARM core. DSP is consisted
of KBS, JTAG, EMI and UART. ARM core is consisted of EMI, PIC(Programmable Interrupt Controller),
reset/power/clock unit, DMA controller, TIC(Test Interface Controller), peripheral bridge, PPI, SSI(Synchronous Serial
Interface), ACC(Asynchronous communications controllers), timer, ADC, RTC(Real-Time Clock) and keyboard interface.
KBIO(0:7), address lines of DSP core and HD[0~15]. HA[1~26], address lines of ARM core and HD[0~15], data lines of
ARM core are connected to memory, YMU788.
NCSRAM, NCSFLASH in the ARM core are connected to each memory. HWR_N and HRD_N control the process of
memory. External IRQ(Interrupt ReQuest) signals from each units, such as, PMU need the compatible process.
KBIO[0~7] receive the status from key and RXD0/TXD0 are used for the communication using data link
cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).
It has JTAG control pins(TDI/TDO/TCK) for ARM core and DSP core. It receives 13MHz clock in CKI pin from
external TCXO. ADC(Analog to Digital Convertor) part receives the status of temperature, battery type and battery voltage.
2-2-10. TOH2600DGI4KRA(26MHz)
This system uses the 26MHz TCXO, TOH2600DGI4KRA, SEM. AFC control signal from OM6359 controls frequency
from 26MHz x-tal. The clock output frequency of UAA3536 is 13MHz. This clock is connected to OM6359, YMU788.
SAMSUNG Proprietary-Contents may change without notice
This Document can not be used without Samsung's authorization
2-4

Advertisement

loading

This manual is also suitable for:

Sgh-x495