Sony MDS-B6P Service Manual page 55

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• IC121 Digital signal procesor, digital servo processor, EFM/ACIRC encoder/decoder (CXD2535CR)
Pin No.
Pin Name
1
FS256
2
FOK
3
DFCT
4
SHCK
5
SHCKEN
6
WRPWR
7
DIRC
8
SWDT
9
SCLK
10
XLAT
11
SRDT
12
SENS
13
ADSY
14
SQSY
15
DQSY
16
XRST
17
TEST4
18
CLVSCK
19
TEST5
20
DOUT
21
DIN
22
FMCK
23
ADER
24
REC
25
DVSS
26
DOVF
27
DODT
28
DIDT
29
DTI
30
DTO
31
C2PO
32
BCK
33
LRCK
34
XTAO
35
XTAI
36
MCLK
37
XBCK
38
DVDD
39
WDCK
40
RFCK
I/O
O
11.2896 MHz clock output (MCLK) (Not used)
Output of FOK signal to system controller (IC301)
O
Outputs "H" when focus is set
O
Outputs defect ON/OFF switching signal (Not used)
O
Outputs track jump detection signal to system controller (IC301)
I
Track jump detection enable input (Fixed at "H")
I
Inputs laser power switching signal from system controller (IC301)
I
Not used (Fixed at "H")
I
Inputs write data signal from system controller (IC301)
I
Inputs serial clock signal from system controller (IC301)
I
Inputs serial latch signal from system controller (IC301)
O
Outputs write data signal to system controller (IC301)
O(3)
Outputs internal status (SENSE) to system controller (IC301)
O
ADIP sync signal output (Not used)
Output subcode Q sync (SCOR) to system controller (IC301)
O
Outputs "L" every 13.3 msec Outputs "H" at all most mostly
Outputs digital-in U-bit CD format subcode Q sync (SCOR) to system controller (IC301)
O
Outputs "L" every 13.3 msec Outputs "H" at all most mostly
I
Inputs reset signal from Q403 Reset: "L"
I
Test input (Fixed at "L")
O
Not used
I
Test input (Fixed at "L")
O
Digital audio signal output
I
Digital audio signal input (Not used)
O
ADIP FM demodulation clock signal output
O
ADIP CRC flag output "H":Error
Input of recording/playback switching signal from system controller (IC301)
I
Recording: "H" Playback: "L"
Ground (Digital)
I
Digital audio output validity flag input (Fixed at "L")
I
Input of data for digital audio output from CXD8633Q (IC901)
O
Output of data for digital audio input
I
Input of recording audio data signal from CXD2536CR (IC401)
O(3)
Output of playback audio data signal to CXD2536CR (IC401)
Outputs C2PO signal to CXD2536CR (IC401) (Output indicating data error status)
O
Playback: C2PO ("H") Digital recording: D.In-Vflag Analog recording: "L"
O
Outputs bit clock signal (2.8224 MHz) to CXD2536CR (IC401) (MCLK)
O
Outputs L/R clock signal (44.1 kHz) to CXD2536CR (IC401) (MCLK)
O
For crystal
I
Input of system clock (512fs) for crystal
O
MCLK clock (22.5792 MHz) signal output (Not used)
O
Pin 32 (BCK) inversion output (Not used)
Power supply (+5V) (Digital)
O
WDCK clock (88.2 kHz) signal output (MCL) (Not used)
O
RFCK clock (7.35 kHz) signal output (MCLK) (Not used)
— 80 —
Function

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