ASROCK H81TM-ITX R2.0 User Manual page 57

CAS Write Latency (tCWL)
Conigure CAS Write Latency.
tREFI
Conigure refresh cycles at an average periodic interval.
tCKE
Conigure the period of time the DDR3 initiates a minimum of one refresh
command internally once it enters Self-Refresh mode.
tRDRD
Conigure between module read to read delay.
tRDRDDR
Conigure between module read to read delay from diferent ranks.
tRDRDDD
Use this to change DRAM tRWSR Auto/Manual settings. he default is [Auto].
tWRRD
Conigure between module write to read delay.
tWRRDDR
Conigure between module write to read delay from diferent ranks.
tWRRDDD
Use this to change DRAM tRRSR Auto/Manual settings. he default is [Auto].
Conigure between module write to read delay from diferent DIMMs.
tWRWR
Conigure between module write to write delay.
tWRWRDR
Conigure between module write to write delay from diferent ranks.
tWRWRDD
Conigure between module write to write delay from diferent DIMMs.
RTL (CHA)
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