Ic 2001 (Cds/Agl) - JVC GC-QX3U Service Manual

1.4.2 IC 2001 (CDS/AGL)

ADCIN
CDSSW
CDSIN
BLKSH
BLKFB
Pin Descriptions
Pin No. Pin Name Description
1 NC No internal connection
2 D0 Digital output terminal (LSB)
3-10 D1-D8 Digital output terminals
11 D9 Digital output terminal (MSB)
12 NC No internal connection
13 OADCLK Latch clock output terminal for D0 to D9
14 DV Digital GND (0V)
SS
15 DV Power for digital 3.0V system
DD
(Should be connected to AV
16 ADCLK Analog-to-digital conversion clock input terminal I
17 OBP Optical black pulse input terminal
18 SPBLK Black level sampling clock input terminal
19 SPSIG Signal level sampling clock input terminal
20 PBLK Pre-blanking signal input terminal
21 OADSW OADCLK enable input terminal
22 AV Analog GND (0V)
SS
23 AV Power for analog 3.0V system
DD
24 NC No internal connection
25 CDSSW Signal level sampling output terminal
26 CDSIN CDS input terminal
27 ADCIN ADC input terminal
28 BLKSH Black level sample/hold terminal
29 BLKFB Black level feedback terminal
30 AV Analog GND (0V)
SS
31 AV Power for analog 3.0V system
DD
(Should be connected to DVDD outside the IC.)
32 VRT Reference voltage terminal 3
(Ceramic capacitor of 0.1µF or more should be
connected between this terminal and AVss.)
33 VRB Reference voltage terminal 2
(Ceramic capacitor of 0.1µF or more should be
connected between this terminal and AVss.)
21 13
TIMING
27
25
26
CDS PGA
28
DC offset Serial
29
compensatory Interface
17 20 44 45
Analog (A) or
I/O
Digital (D)
- -
O D
O D
O D
- -
O D
- D
- D
outside the IC.)
DD
D
I D
I D
I D
I D
I D
- A
- A
- -
O A
I A
I A
- A
- A
- A
- A
- A
- A
16 18 19 41 46 40 48
gen
10bit
ADC
Output
Latch
circuit
Bias
Occurrence
43 35 33 34 32
34 VRM Reference voltage terminal 1
(Ceramic capacitor of 0.1µF or more should
be connected between this terminal and AVss.)
35 BIAS Internal bias terminal
(A 24-Kohm resistor should be connected
between this terminal and AVss.)
36 NC No internal connection
37 AV Analog GND (0V)
SS
38 AV Power for analog 3.0V system
DD
(Should be connected to DV
39 NC No internal connection
40 AV Analog GND (0V)
SS
41 AV Power for analog 3.0V system
DD
(Should be connected to DV
42 OEB Digital output enable control input terminal
43 CS Serial interface control input terminal
44 SCK Serial clock input terminal
45 SDATA Serial data input terminal
46 DV Power for digital 3.0V system
DD
(Should be connected to AV
47,48 DV Digital GND
SS
42 OEB
11 D9
10 D8
9 D7
8 D6
7 D5
6 D4
5 D3
4 D2
3 D1
2 D0
- A
- A
- -
- A
- A
outside the IC.)
DD
- -
- A
- A
outside the IC.)
DD
I D
I D
I D
I D
- D
outside the IC.)
DD
- D
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