LG KF750 Service Manual page 75

3. TECHNICAL BRIEF
C. Synthesizer
The RX and TX RF VCOs are fully integrated and self-calibrated on manufacturing tolerances.
They have 16 different frequency ranges that are selected internally depending on the frequency
programming. The calibration is done on each low to high logical transition of the SYNON bit in the
control register or on each change of the integer divider ratio of the RF fractional N synthesizer.
A high-performance RF fractional-N synthesizer PLL is included on-chip which enables the frequency
of the RF VCO to be synthesized. The frequency is set through the 3-wire serial programming bus.
The PLL is based on Sigma-Delta (∑.) fractional-N synthesis that enables the required channel
frequency, including Automatic Frequency Control (AFC) from a free running external 26 MHz
reference frequency. Very low close-in-phase noise is achieved. This allows widening of the PLL loop
bandwidth and shorter settling time. The programmable main dividers are controlled by a second order
∑-modulus controller. They divide the RF VCO signals down to frequencies of 26 MHz (12 Hz step
programmability). Their phase is then compared in a digital Phase/Frequency Detector (PFD) to the 26
MHz reference clock signal.
The phase error information is fed back to the RF VCO through the charge pump circuit that .sources.
into or .sinks. current from the loop filter capacitor, thus changing the VCO frequency such that the
loop finally gets phase-locked.
5 2
G 2 G 1
W T X M O D _ B A N D I _ O U T N I
4 1
G 3
S A F E B 1 G 9 5 K A 0 F 0 0 3 F L 2 0 1
V R A D A _ 2 V 8
C 2 2 3
D I N
W T X _ _ I P
W T X _ _ I N
W T X _ Q _ P
W T X _ Q _ N
T P 2 0 0
LGE Internal Use Only
C 2 1 8
V R A D A _ 2 V 8
5 6 p
C 2 2 0
D I N
C 2 2 1
D I N
W P A _ B A I S
W P A _ V C C
1
G N D T X
2
N C 1
3
N C 2
4
T X _ 1
5
N C 3
6
V C C L O
7
T X A I
8
R
T X B I
9
T X Q A
1 0
T X Q B
T P 2 0 1 T P 2 0 2 T P 2 0 3
T P 2 0 4
R F _ C T R L _ D A T A
R F _ C T R L _ C L K
R F _ C T R L _ S T R B
C 2 2
W C L K
Figure 3-7-4. WCDMA Transceiver schematic
C 2 1 7
C 2 1 6
D I N
5 6 p
F L 2 0 0 S A F E B 2 G 1 4 F A 0 F 0 0
V R A D A _ 2 V 8
C 2 2 2
D I N
V I D G R A D _ 1 V 8
3 0
N C 9
2 9
L N A 1 _ O U T
2 8
N C 8
2 7
U 2 0 3
L N A 1 _ N I
2 6
N C 7
2 5
T X N C 6
2 4
V C C L O R X
2 3
F 3 1 0 0 _ O M 6 1 9 5 H N
N C 5
2 2
V D D
2 1
T S T
C 2 2 7
D I N
R 2 0 5
W R X _ Q _ N
2 2 0
R 2 0 6
W R X _ Q _ P
2 2 0
R 2 0 7
W R X _ _ I N
9 8 2 . p
2 2 0
R 2 0 8
W R X _ _ I P
2 2 0
Copyright © 2008 LG Electronics. Inc. All right reserved.
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V R A D A _ 2 V 8
C 2 2 5
C 2 2 4 5 6 . p
5 6 p
L 2 0 4
4 7 . n H
C 2 2 8
D I N
Only for training and service purposes
W R X _ B A N D _ 1