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7
GEMINI
7.1 Introduction
Gemini contains the DSP, CPU and GSM timing functions and many peripheral functions. The software for the DSP is
contained in masked ROM.
7.2 Functional Description
7.2.1 Digital Signal Processor
The Digital Signal Processor (DSP) core is compatible with the Texas Instruments TMS350C5xx family of DSPs. Included in
the DSP core is an interface to the CPU by a shared memory interface.
The DSP memory is also located within GEMINI. The ROM code size is determined by the size of the software.
7.2.2 CPU
The CPU is an ARM7 32 bit RISC CPU with 16 bit instruction set. The CPU is designed to access 32 bit memory and
peripherals; a further module within the GEMINI chip allows access to 8 or 16 bit memory.
For 120 ns access FLASH and RAM a 13 MHz clock gives 1 wait state access to both devices.
MCUK981201G8
Technical Guide
http://cxema.ru
BASEBAND
INTERFACE
GSM
TDMA
TIMER
TPU
SIM
I/F
Figure 7.1: GEMINI Block Diagram
Clock Speed
Memory Access Time
19.5 MHz
41 ns
13 MHz
67 ns
9.75 MHz
91 ns
6.5 MHz
144 ns
4.875 MHz
194 ns
3.75 MHz
298 ns
SPEECH
INTERFACE
DSP
CORE
MEM
Memory Access Times
Additional Access time per wait state
51 ns
77 ns
102 ns
154 ns
204 ns
308 ns
Section 7
– 31 –
PWM
ARM
I/O
I/F
10087-1
GEMINI
Issue A
Revision 0
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