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Port No.
Port Name
60
4228 RST
61
LC7821 CE
62
SM7346 CE
63
T MUTE
64
S MUTE
65
C MUTE
66
F MUTE
67
W MUTE
68
CS49326 RST
69~71
DSP (A15~A17)
72~88
SEG (1~17)
89
VDD
90,91
SEG18,19
92-100
GRID (11~3)
2. Port list sorted by function for MPEG Processor IC(Main IC201)
Port No.
Port Name
Audio DAC
51
DAC SCLK
52
DAC PCMOUT0
53
DAC PCMOUT1
54
DAC PCMOUT2
55
DAC PCMCLK
56
DAC LRCLK
57
SPDIF OUT
48
VDD PCM
49
VSS PCM
Clock & Reset
124
RESET
122
VDD PLL
123
VSS PLL
120
PIX CLK
PIOs and communication
186
PIO0(0) T STROBE
187
PIO0(1) MOD SW
188~191
PIO0(2)~PIO0(5)
PIO0(6) SLIDER SENSOR
192
OPEN/CLOSE
(DRAWER POSITION)
PIO0(7) SLIDER IN
193
(DRAWER CCW/CTRL)
194
PIO1(0) SDA
195
PIO1(1) SCL
PIO1(2) SLIDER OUT
196
(DRAWER CW CTRL)
197
PIO1(3) TXD(JIG)
200
PIO1(4) RXD(JIG)
201
PIO1(5) FRONT TXDI
202
TRIGGER IN
203
TRIGGER OUT
204
PIO2(0) H/P IND
205
PIO2(1) FRONT RXD
206
PIO2(2)
207
PIO2(3)
208
PIO2(4) AUDIO MUTE
CIRCUIT DESCRIPTION
I/O
O
CS4228 (IC1) RESET
O
LC7821(TUNER PACK) CHIP ENABLE
O
SM7346 (IC84) CHIP ENABLE
O
TUNER MUTE
O
REAR SIGNAL MUTE
O
CENTER SIGNAL MUTE
O
FRONT SIGNAL MUTE
O
SUB WOOFER SIGNAL MUTE
O
CS49326 DSP IC (IC5) RESET
O
DSP ROM ADDRESS (SEL 1~3)
O
FIP SEGMENT
-
VDD (DIGITAL VDD)
O
FIP SEGMENT
O
FIP GRID
I/O
Function
O
Over sampling clock
O
PCM out 0
-
PCM out 1 (unused)
-
PCM out 2 (unused)
I/O
PCM clock
O
Left/Right clock
O
SPDIF out
-
VDD(+3V3)
-
GND
I
Chip reset
-
VDD PLL
-
GND
I
27MHz main clock
I/O
PIO0(0)
I/O
PIO0(1)
O
Unused
I/O
PIO0(6)
I/O
PIO0(7)
I/O
PIO1(0)
I/O
PIO1(1)
I/O
PIO1(2)
I/O
PIO1(3)
I/O
PIO1(4)
I/O
PIO1(5)
I/O
Trigger in for DCU
I/O
Trigger out for DCU
-
Unused
I/O
PIO2(1)
-
Unused
-
Unused
I/O
Audio mute
DVR-505/7000
Description
Main
Input
EXT AUD REQ
UART0 data
SSC0 data
(MTSR out/MRST in)
SSC0 clock
PARA DVALID
UART2 RXD
PARA SYNC
PARA SYNC
Alternate function
Output
EXT AUD CLOCK
EXD AUD DATA
EXT AUD WCLK
ATAPI RD
UART2 TXD
UART1 RXD
5
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