Table of Contents
Advertisement
PMD-100
PMD-100 Process Decoder
Pin Description (Stand-Alone Mode) -
Pin 9 Low
( I = Input, O = Output. All input levels TTL compatible
except XTI which must be CMOS level. No inputs have
pull-ups. All outputs are full CMOS levels. )
1:
DIN (I)
Serial data input.
2:
BCKI (I)
Bit clock input.
3:
XTIM (I)
Select system clock frequency.
Low = 256 Fs, High = 384 Fs.
4:
DITH (I)
Dither select.
Low = dither disabled,
High = dither added.
5:
GAIN (O)
Analog output stage gain.
Use only if Pin 19 is High (see page
14).
Low = low gain,
High = high gain (+6 dB).
(See pin 19 description).
6:
XTI
(I)
System clock input.
7:
VDD1
+5 volt power for filter.
8:
VSS1
Ground
9:
PROG(I)
Select Program mode.
Low = Stand-Alone,
High = Program.
Note: Pins 10 through 14 perform different functions
depending on whether Stand-Alone or Program mode is
selected.
Stand-Alone Mode:
10: OSIZ0 (I)
11: OSIZ1 (I)
These two pins determine the output word size, as well as
the number of pulses on BCKO.
12:
COB (I)
Output data format.
Low = complementary offset binary,
High = 2's complement.
13:
JUST (I)
Input data justification.
Low = data assumed to be left justi
fied up to 24 bits in length,
High = data right justified 16 bits.
14:
BCPL (I)
Input data latching.
Low = input data latched on rising
edge of BCKI. High = input data
latched on falling edge of BCKI.
15:
SMUTE (I) Soft mute. Low = off, High = on.
16:
DEEMPH(I) De-emphasis filter.
Low = off, High = on.
17:
HMUTE (I) Hard mute. Low = off, High = on.
18:
FSEL (I)
De-emphasis filter Fs.
Low = 44.1 kHz, High = 48 kHz.
19:
SCAL (I)
Gain scaling.
Low = 6dB gain scaling is performed
internally in the digital domain,
High = analog output gain stage is set
by pin 5 GAIN. (See page 14.)
20:
DG
(O)
DAC sample and hold deglitch signal.
21:
VSS2
Ground. (Common with VSS1)
22:
VDD2
+5 volt power for output interface.
23:
DOR (O)
Right channel serial data output.
24:
DOL (O)
Left channel serial data output.
25:
WCKO(O) Word clock output.
26:
BCKO (O) Bit clock output.
27:
HDCD (O) HDCD encoding detect.
Low = no encoding. High = HDCD
encoded input data. (Output current
rated at 12mA.)
28:
LRCI (I)
Word clock input.
57
FL8550
®
Hide quick links:
Advertisement
Table of Contents
Troubleshooting
