Digital Board Ic503 Cxd2605Q (Master Dat-Dsp) - Sony PCM-R500 Service Manual

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• DIGITAL BOARD IC503 CXD2605Q (Master DAT-DSP)

Pin No. Pin Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
TE
L 13942296513
20
21
22
23
24
25
26
27
28
29
30 MUTM
31
32
33
34
35
36
37
38
39
40
www
41
42
43
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I/O
A8 O External RAM address output
A9 O External RAM address output
VDD — +5V
A10 O External RAM address output
A11 O External RAM address output
A12 O External RAM address output
A13 O External RAM address output
A14 O External RAM address output
XWE O External RAM write enable signal output
XOE O External RAM output enable signal output
XEAN O External addressing enable signal output. (Not used in this set.)
TST1 I Test input (Fixed at "L" level.)
XT1O O X'tal oscillation circuit 1 output
XT1I I X'tal oscillation circuit 1 input
VSS — Ground
XRST I Reset input. "L" for reset.
System clock output. (The frequency is 4.9152 MHz when SELC is set "L" and 8.192 MHz
CLKO O
when SELC is set "H".) (Not used in this set.)
Control byte (1). Bit 1: Q code decode (intercurve detection) output when "L" and BCK clock
MINT O
output by RX-PLL when "H". (Not used in this set.)
ATSY I ATF sync signal input
MCLK O Channel clock (fch) output (Not used in this set.)
DREF O SBSY cycled Duty 50 signal output
Control byte (1). Bit 1: Output of monitor signal for data transfer to and from microcomputer
SBPM O
when "L" ("L" to permit transfer) and F256 clock output by RX-PLL when "H".
(Not used in this set.)
EXCK I Input of clock for data transfer to and from main microcomputer (IC501).
SDSI I Serial data input from main microcomputer (IC501).
SDSO O Serial data output to main microcomputer (IC501).
SBSY O Output of frame sync signal for data transfer to and from main microcomputer (IC501).
PLRF O Output of PLL clock divided by 5880. (Not used in this set.)
9.8304MHz output when SELC is "L" and 12.288MHz output when SELC is "H".
CCLK O
(Not used in this set.)
MUTE I Mute input. Set "H" to mute, but REC monitor sound will not be muted.
O Mute monitor. "H" in muting.
UNLK O RX-PLL lock monitor signal output. "L" in locking.
RFCT I Area signal input. ("L" to enable AREA signal and "H" to disable AREA signal.)
SYMN O RF associated C1 check result monitor signal output. (Not used in this set.)
SELB I Test pin (Fixed at "H" level.)
Control byte (1). Bit 1: RF-PLL clock output when "L" and F128 clock output by RX-PLL
PLCK O
when "H" (Not used in this set.)
TST2 I Test pin (Fixed at "L" level.)
RFDT I Playback RF signal input
XCS I Input of chip select signal for data transfer to and from microcomputer. "L" to permit transfer.
SWP I RF switching pulse. "L" to select A track and "H" to select B track.
VSS — Ground
Output of ATF pilot signal/descrimination signal for recording signal. "H" to output pilot
PIPC O
signal.
x ao
REPB O REC/PB descrimination signal output. "H" for REC mode.
y
REDT O Recording signal output.
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Function
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