Sharp LC-19LE320 Service Manual page 79

The MT5363LICG is 27x27mm BGA Package
3.3V/1.0V and 1.8V for DDR2
1.2. U101 (Si2163 QFN-36)
Description
The analog front-end consists of two ADCs with wide dynamic range (12-bit) to allow operation with standard IF (~36 MHz), Low-IF, or Zero-IF inputs. This
enables the use of the Si2163 with any TV tuner, either metal can or silicon tuner based. The Si2163 supports ITU J.83 annex A/C and DVB-C (EN 300
429) and accepts symbol rates from 1 to 7 MSymbol/s.The Si2163 includes a user-configurable 31-tap equalizer for optimum reception even in case of
difficult network conditions, such as long echoes. Serial or parallel master MPEG TS output modes are supported. Furthermore, a TS slave parallel mode
is available via a GPIF port and provides glue less interface to Silicon Labs' MCU devices with embedded USB interface. The user can optionally program
a 32-PID hardware filter to reduce the output TS bit rate (or add more TS security for Pay-TV channels).An embedded DSP controls the scanning
operations. The Si2163 supports ultra-fast channel scanning for VHF/UHF cable DTV channels, thanks to proprietary features. For supported tuners, the
complete algorithm for fast channel scan, QuickScan, is provided as a downloadable patch file. QuickScan runs on the embedded DSP to limit the host
CPU / MPEG decoder software burden.An internal I
A maximum of six general-purpose inputs/outputs are available; three GPIOs also feature ∆/Σ and interrupt output capabilities. Best-in-class demodulation
performance is achieved while still maintaining very low-power operation. The Si2163 also includes an IF sub-sampling mode for further reducing power
consumption. The Si2163 guarantees a low-cost system implementation due to its minimal BOM and very small package footprint. Si2163 remains pin-to-
pin application compatible with Si2165 (multi-standard DVB-T & DVB-C demodulator) and Si2161 (DVB-T demodulator).
Features
- ITU J.83 Annex A/C and DVB-C (EN 300 429) compliant
- NorDig Unified 1.0.3 and C-Book compliant
- Suitable for low power design: 115 mW (typical, 36 MHz IF normal sampling mode)
- Dual 12-bit ADCs: accept 1st IF, low IF, or zero-IF inputs.
- 1 to 7 MBaud symbol rate
- Independent AGC controls (for IF & RF), plus RSSI measurement
- ACI filtering: fixed 8 MHz SAW filter even for low symbol rates
- Ultra fast, DSP controlled, automatic UHF/VHF band scanning (QuickScan)
- Master TS output modes, parallel or serial (with tri-state function)
- Slave TS parallel output: external device polls data from an embedded FIFO. This provides a seamless interface to any USB controller.
- On-chip PID filtering to reduce TS output bit rate
- Up to six GPIOs
- Two 5 V tolerant I2C control buses (host-side, tuner-side) with on-chip I2C logic switch.
- 4, 16, 20, 24, or 27 MHz clock/crystal reference
- 3.3 and 1.2 V power supplies only
- Very compact QFN-36, 5 x 6 mm, RoHS compliant package
Applications
- Digital cable STB, NIM, and iDTV set
- Cable enabled Personal Video Recorder (DVD or HDD-based)
- Digital cable PC-TV card or peripheral
1.3. U402 (NT5TU32M16CG-BD BGA-84)
Features
LC-19LE320, LC-22LE320, LC-26LE320, LC-32LE320, LC-37LE320, LC-42LE320
2
C pass-through logic switch acts as an I
2008-03-14
2
C repeater and provides a "quiet" I
79
2
C bus to the RF front end.