QQ
3 7 63 1515 0
FUNCTIONAL BLOCK DIAGRAM
LRCK
Audio
BCK
Data Input
DATA
MUTE
RST
MSEL
MDO
MDI
Function
Control
MC
MS
ZEROL
ZEROR
Detect
TE
L 13942296513
SM8701BM (IC113)
MLEN/R2
1
P/S
2
V
3
DD
GND
4
XTO
5
XTI
6
GNDP
7
V
P
8
DD
V
3
9
DD
MO
10
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I/F
8
Oversampling
Digital
Filter
and
Function
Control
I/F
System
Zero
Clock
Manager
SM8701BM Terminal Function
Pin No.
20
MCK/R1
19
MDT/R0
18
RSTN
17
SO3
16
V
O
DD
GNDO
15
14
SO2
13
SO4
12
SO1
11
MON
x
ao
y
i
Note: 1. Schmitt trigger input with pull-down resistor
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8
Current
Segment
DAC
and
I/V Buffer
Advanced
Bias
Segment
and
DAC
Vref
Modulator
Current
Segment
DAC
and
I/V Buffer
Power Supply
Q Q
3
6 7
1 3
Pin Name
I/O
Control signal input.
1
1
MLEN/R2
Ip
In serial mode: latch enable signal
In parallel mode: sampling rate select signal
Mode select signal.
1
2
P/S
Ip
LOW: serial mode, HIGH: parallel mode
5V supply (Digital block)
3
V
DD
Ground (Digital block)
4
GND
5
XTO
O Reference signal crystal oscillator element connection
Reference signal crystal oscillator element connection
6
XTI
I
or external clock input
Ground (PLL block)
7
GNDP
5V supply (PLL block)
8
V
P
DD
3.3V supply (output buffer)
9
V
3
DD
10
MO
O 27 MHz fixed-frequency output
11
MON
O 27 MHz fixed-frequency output (inverted)
12
SO1
O 33.8688 MHz fixed-frequency output
13
SO4
O 768fs output
14
SO2
O 256fs output
Ground (output buffer)
15
GNDO
3.3V supply (output buffer)
16
V
O
DD
17
SO3
O 384fs output
2
18
RSTN
Ip
LOW-level reset input
Control signal input.
u163
1
19
MDT/R0
Ip
In serial mode: control data input signal
In parallel mode: sampling frequency select signal
Control signal input.
.
1
20
MCK/R1
Ip
In serial mode: clock signal
In parallel mode: sampling frequency select signal
2. Schmitt trigger input with pull-up resistor
75
DVD-2910/955
2 9
9 4
2 8
V OUT L−
V OUT L+
D/S and Filter
V COM
V OUT R+
V OUT R−
D/S and Filter
1 5
0 5
8
2 9
9 4
Function
m
co
9 9
2 8
9 9