Platform Block Diagram - Sony Ericsson W995 Troubleshooting Manual

RX Diversity for WCDMA
Band I
Band II
Band V
VBAT
LDO
2.8 V
2.8 V
VRAD
VBAT
1930 – 1990 MHz
1805 – 1880 MHz
925 – 960 MHz
869 – 894 MHz
GSM/EDGE
VAPC
PA + Ant Sw.
GSM850/
ESD 900 Input 824 – 915 MHz
PA
DCS/PCS
1710 – 1910 MHz
Input
PA
VBAT
VccWPA
UL: 1920 – 1980 MHz
DL: 2110 – 2170 MHz
Band 1
Power
coupler
UL: 1850 – 1910 MHz
DL: 1930 – 1990 MHz
Band 2
Power
coupler
UL: 824 – 849 MHz
DL: 869 – 894 MHz
Band 5
TEMP_BIAS
V_TEMP
Power
Placed coupler
close to RF
2.75 V
VRAD
TEMP_BIAS
LCDTEMP
RF Pow det
Det
Placed
close to En
LCD
WRFCTRL3
DAC0
DACO0
11 bits
DAC1
WDAC1 DACO1
11 bits
SERCON
WDAC2 DAC2
DACO2
11 bits
VBAT
DAC3
DACO3
11 bits
TRICKLE USB
DET
VBUS
USB CHRG
VBAT
2.75 V
CONTROL
VBAT_C
DCIO
AUTO
CTL M
DCIO
I2C
U
ADC
CHREG 10bit X
DCIO_INT
I2C
DCIO CHRG
DCIO CONTROL
DET
FUEL
CHSENSE+ GAUGE
VBAT
IMEAS ADDER
100 CHSENSE-
mohm
VMEAS
FGSENSE+
S-D
LED Control
FGSENSE-
ADC
BAND
GAP
VDD_REF VIBRATOR
I2C CONTROL
BATTERY 1uF UART
VBAT
BDATA BDATA
uP SAFETY
2.65 V
GND
VANA
25
mohm
VBAT
Vibrator if LED interface
VBAT
FUNCTIONAL OVERVIEW FUNCTIONAL OVERVIEW
RF 3300 WCDMA RX (other functions unused)
GSM/EDGE WRxIA
HB
LNA WRxIB
GSM/EDGE
HB
LNA
0
GSM/EDGE
90
LB LNA
GSM/EDGE WRxQA
LB LNA
WRxQB
EDataStr
WCDMA HB LNA
A
EDataB
D
WCDMA HB LNA
EDataC
A
EDataA
WCDMA LB LNA
D
VCO
GSM/
EDGE LB
÷
VCO
N.M 2.8 V
VRAD2
GSM/
EDGE HB
+
LPF ChP PhD XO
2.8 V
DAC DAC DAC
VRAD2 1.8 V
VIO
GSM/EDGE
AM +
DAC
RFCtrl1 CLK RF_CTRL_CLK
RFCtrl1
Serial
DATA RF_CTRL_DATA
LPF ChP PhD Control
RFCtrl2 STROBE RF_CTRL_STRB1
RFCtrl2
TestOut GPA4
÷
WCDMA HB3
VCO
N.M
WTxIA
WCDMA HB2
WTxIB
WCDMA HB1 0
+
90
WCDMA LB WTxQA
WTxQB
MCLKsec MClkSec
CLKREQ
MCLK
XO
XOp
RF 3300 WCDMA/GSM/GPRS/EDGE TRX
GSM/EDGE WRxIA
HB
LNA WRxIB
GSM/EDGE
HB
LNA
0
GSM/EDGE
90
LB
LNA
GSM/EDGE WRxQA
LB LNA
WRxQB
WCDMA HB LNA EDataStr RF_DATA_STRB
A
EDataB
RF_DATA_B
D
WCDMA HB LNA
EDataC RF_DATA_C
A
EDataA
WCDMA LB LNA RF_DATA_A
D
VCO
GSM/
EDGE LB ÷
VCO
N.M
2.8 V
GSM/ VRAD
EDGE HB
+
LPF ChP PhD XO
1.8 V
VIO
WDCDCREF
PWM/PFM
DAC DAC DAC
Switch
GSM/EDGE
Control En RFCtrl1 AM +
DAC
Logic
RFCtrl1 CLK RF_CTRL_CLK
RFCtrl1
Serial
DATA RF_CTRL_DATA
LPF ChP PhD
RFCtrl2 Control STROBE RF_CTRL_STRB0
RFCtrl2
VccWPA
GPA4
÷ TestOut
WCDMA HB3
VCO
N.M
Bias
En WTxIA
WCDMA HB2
WTxIB
WCDMA HB1 0
+
VccWPA
90
WCDMA LB WTxQA
WTxQB
Bias
En
MClkSec
MCLKsec
26MHz X-tal CLKREQ CLKREQ
MCLK MCLK
XO
XOp
VccWPA
Bias
En
WTXPOW_DET
1.2/1.05 V
VCORE
2.5 V 2.8 V
VANA VRAD
VBAT I2C BUS Internal Acc and App
VIO VANA
SYSCLK1
VBAT
Backup
Cap
2
Analog RF LDO a I C
PLL 32 kHz
LDOf EGG/WBTX
44/48
30 mA 150 mA ; osc
Internal BUCK 2.5~1.05V 2.8 V SLEEP
CONTROL
1.8 to 0.9 V 1MHz
5% OSC
600 mA
Level
shift
MemCard
LDOc LDO d SYSTEM
G
LDOg
200 mA 200 mA ; POR
100 mA ;
BOOST 2.65 V
2.65 V
2.85 V
(Soft start)
6-22 V, 30 mA
SIM
LED Control Camera I/O/Core LDO
IR LDOk
LDOh LDOe LDO LP
200 mA OTP
100 mA ; 200 mA
2.2 V
2.75 V
2.75 V 1.8~0.9V 64 bits
Power Management
VDDLP
VBACKUP
VBAT
VBAT
VBAT
Backup
capacitor
1.8 V
VIO
2.65 V
VANA
2.65 V
VAUDIO
WLED interface SIM interface
VCC C1
2.75 V
VIR
2.85 V
RST C2
VCARD
CLK C3
2.75 V
VCAM+Display

Platform Block Diagram

External to Platform
Internal to Platform
ARM9 Sub system
ITCM DTCM
ETM9
26 kB 8 kB
Digital
Baseband
Controller ETM IF TCM IF
Decaps
ARM926 EMIF Control
ARM9EJ-S
I Mem D Mem
Control Control
Shared EMIF
AHB Slave
I
D
MMU
Cache Cache
TLB
1.2/1.05 V 32 kB 32 kB
VCORE
DMA
AHB BUS IF
58 Channels
AHB AHB 50 Requests
Master Master
AHB
Default
AHB AHB
slave
IF IF
1.2/1.05 V
VCORE
ARB
WRX1_In ADC2_I_NEG
WRX1_Ip ADC2_I_POS
WRX1_Qn ADC2_Q_NEG
WRX1_Qp ADC2_Q_POS 52 MHz
BT + WLAN
WRX0_In ADC1_I_NEG
WRX0_Ip ADC1_I_POS
WRX0_Qn ADC1_Q_NEG
WRX0_Qp ADC1_Q_POS
WTXPOW_DET TX_POW
ADC
WTX_In DAC_I_NEG
WTX_Ip DAC_I_POS
WTX_Qn DAC_Q_NEG
WTIM- WSYS-
WTX_Qp DAC_Q_POS WCDMA SUB System
GEN CON
WRFCTRL0 RFWB ENABLE 0
WRFCTRL1 RFWB ENABLE 1
WRFCTRL2
WRFCTRL3 RFWB ENABLE 3
RFWB ENABLE 4
CLK
RFWB ENABLE 5 16 16
GSM 32+5
CON
CRYPTO
AHB IF
TIM 32+3
ANTSW0 ANT_SW0 16 VA
16 GEN 32+3
ANTSW1 ANT_SW1
O 32+3 32
ANTSW2 ANT_SW2 R 16 SER
16 DFSE 32+3
7k x 32
ANTSW3 ANT_SW3
CON 32+5
32
TXADC
TX ADC STRB 26 MHz
GSM PA ENABLE
32+3
RF_CTRL_CLK
RF CTRL CLK 16 TXIF 32+3 EGG
RF_CTRL_DATA RF CTRL DATA 32+5
Sub System
RF_CTRL_STRB0 RF CTRL STRB0 16
RFIF
RF_CTRL_STRB1 RF CTRL STRB1
Random noise
RF CTRL STRB2
16 RXIF 32+5
RF_DATA_STRB RF_DATA_STRB
RF_DATA_A RF_DATAA0
26 MHz
RF_DATA_B RF_DATAB1
RF_DATA_C RF_DATAC2
Bus Watch Event AHB2APB
SIMIF
26 MHz
SCLK SIM_CLK Tracer Dog Hist
Access
SRST SIM_RSTn
Timer
ETX
PWRRST PWRRSTn Boot ROM
SYS Cable
GPIO
RESOUT0n 8k x 32 bit
To NAND WP CON Detect EDC
RESOUT1n
INTCON
RESOUT2n
DCON
15 FS_USB/
ACCSLEEP
HS_USB
APPSLEEP
CLKREQ MCLKREQ
MCLK MCLK
DPLL
SYSCLK0REQ
To Camera APLL
SYSCLK0
SYSCLK2
SYSCLK1 SYSCLK1
32KHz RTCCLKIN
SERVICEn
IRQAcc MSACCIRQn
IRQApp MSAPPIRQn
APLL
2.5 V
VANA
IO
1.8 V
CTS/RTS
VIO
VBAT
100k
100k
VRTC
100k
I2S BUS
IRQa
Audio Part AB 3100
IRQb
PWRRST
RX DAC
Vol
PGA2 4
XTAL_OUT 32KHZ
RX DAC
Vol
PGA2 3
RX DAC
Vol
PGA2 2
I2S_CLK1 PCMCLK
PCM/
I2S_WS1 PCMSYN
I2S RX DAC
I2S_TX1 PCMI Vol
Inter- PGA1 1
AB 3100
I2S_RX1 PCMO
face 1
PCM SIDE
DECODER TONE
ENCODER
VDDDIG
I2S_CLK0 PCMCLK
PCM/
I2S_WS0 PCMSYN
I2S
I2S_TX0 PCMI
Inter-
I2S_RX0 PCMO
face 2
TX ADC
PGA1 1
TX ADC
PGA2 2
TX ADC
PGA3 3
GND C5
ADC2REF ADC3REF
On/Off
NC C6
Switch
DAT C7
SIM card
Debug Interface
ACB/
Debug
1.8 V 1.8 V
Mobile SDRAM
DB 3210 POP
VIO VIO
SDRAM 512 Mbit xxx Mbit
DB 3210 POP
CKE CKE
SDCKE SDCKE NAND Flash 1 Gbit
1.8 V
SDCLK CLK CLK CLK RESETOUT0
VDD VDD WP
VIO
SDCS CS CS(0-2) CS
VDDQ VDDQ CLE
EMIF2_CLE_A17
WE WE WE WE
ALE
VSS VSS EMIF2_ALE_A18
CAS CAS
SDCAS OE/CAS
VSSQ VSSQ VDD
RAS RAS EMIF2_SDCAS_RE_OE RE
SDRAS ADV/RAS
A14 BA0 BA0 WE
A13 EMIF2_WE
VSS
A15 BA1 A14 BA1 EMIF2 CS0 CE
BE0 LDQM D(0-15) BE0 LDQM
BE1 UDQM BE1 UDQM D(0-7)
D(0-15)
R/B
EMIF2 NFIF READY
Memory interface
1.8 V 1.8 V
VIO VIO
Digital Baseband
Controller DB 3210
EMIF1
EMIF2
NAND Flash IF
ECC
EMIF AHB Slave AHB Slave
EMIF Arbiter
ARB
AHB Slave
ARM9 Sub system
AAIF AAIF
MSL MSL
AHB AHB IF AHB IF
IF
ARM926
ARM9EJ-S
AHB
I Mem D Mem
ARB ARB AHB2AHB Slave
Control Control
52 MHz
MS
I D
32 MMU
PRO Cache Cache
DMA TLB
AHB IF 32 kB 32 kB
32 2
INTCON
AHB BUS IF
AHB AHB
Boot
32 Master Master
ROM
IO
IM
Bridge
AHB
APEX+
Slave +
AHB
Sequ. Slave XGAM
APEX APEX
GAMCON
RAM ROM
WINT-
COM AHB
Video Video
Master
Enc Enc
RAM0 RAM1
PAR/ SSI
APEX AHB
Slave GRAM
PDI
64k byte
IO Bridge
26 MHz Video
Encoder
PDICON
AHB
DMA
Master
26
40 Channels
AHB AHB
40 Requests Master Slave 27
GAMEACC CDICON
25
AHB ARB
(3D)
Slave 24
IRAM 28-35
MCiDCT
CDI
(Video)
bit
AHB
52 MHz
Slave AHB2APB
SRAM PDROM 13 MHz
DSP
332 kB 464kB
Sub System
WDOG 32
16
KEYPAD
KEYOUT(0-4)
AHB Slave AHB Master 32
generator TIMER0
CEVA-
XpertCEVA 32 PPM
JTAG 32
X1622 TIMER1
DRAM
CRU Timer0 Timer1 Core
128 kB 16 SYSCON
16
RTC
8 IRAM
GPIO ICU PMU
64 kB
32kHz
APLL DPLL
13M 208M IO
BUS TR 32 16 GPIO
AHB
32 32
Slave Event H UART 0
AHB2APB
26 MHz
I2CSCL2
I2C1
I2C2
I2CSDA2
AHB2APB
26 MHz I2S/
UART0 MC_DATADIR
MMC/SD 23
WCDMA
PCM0 MC_CMDDIR
Cipher 0,1
22
MC_CMD/BS
UART2
WCDMA 21
RS232 I2S/ MC_CLK
MS PRO
Integrity DI/DO/CLK 20
PCM1
BT SPI CS0 -2
SDA
GPRS
UART3
SCL
CRYPTO
IRDA CTS/RTS
I2C0
UART 0
RX/TX
I 2 S/PCM
SPI
All 48 GPIOs here
(BT)
have switchable
pullups.
TXRX H
MMC CLK
CAM 2 STBY
CAM 1 STBY
CAM POW
1.8 V
VIO
GPIOif
VBAT
VDD_SPKR
VSS_SPKR
PGA
VDDBEAR 2.65 V
VAUDIO EX1030 Filters
VIO
PGA
1.8 V
PGA
PHF
Jack
VMID
PGA
VSSBEAR
GPA4 Hook
CCO1 CCO
ATMS
CCO
CCO2
MIC1P
CCO
MIC2N
MIC3N
Microphone
MIC4N
LINE1
LINE2
SEMC Troubleshooting Manual
W995
1.8 V
VIO
2.75 V
VCAM
S U B - L C D
VBAT
I2CSDA2
I2CSCL2
1.2/1.05 V
VCORE
L C D VBAT
I2CSDA2
I2CSCL2
1.8 V 2.75 V
CAM 1 STBY
VIO VCAM
1.8 V
Camera 1
VIO
CIVSYN CAM POW
CIHSYN Camera 2
CIPCLK
A
Image
CIRES
D Sensor
proc
C
I2CSDA2
I2CSCL2 Control
CAM 2 STBY
SYSCLK0
R5
Y N
CIVSYN
R4
CIHSYN C
CIPCLK R3
1 2 3
CIRES
R2
4 5 6
R1
7 8 9
R0
1.8 V
* 0 #
VIO
C0 C1 C2 C3 C4
2.85 V
VCARD
1.2/1.05 V
VCORE Data Card
MS Pro
Resistors
MMC/SD
1.8 V
VIO
1.8 V
VIO
I2CSCL2
I2CSDA2
S
L
VIR
VIO
2.75V
1.8V
I/O & IRDA Vcc
Supply
RXD
IRDA_RX COM
AMP
P
VBAT
IRDA_TX TXD
IRDA_SD RC
Log &
MODE Contr
Debug VIO
VBAT
equipm. 1.8V
SPI
Power Down
WLAN
INT
MCLK SEC
32kHz
SYSCLKREQ1
BT SPI CS
USB if
BT SPI DI
BT SPI DO
BT SPI CLK
RESOUT2 Bluetooth
SYSCLKREQ1
Radio
Bluetooth
MCLK SEC
Baseband
32KHz
REG VBAT
PCMCLK
2.75V
PCMSYN
VIO
PCMULD
1.8V
PCMDLD
BT SPI IRQ
HS-USB Transceiver with ULPI, ISP 1508
XI
SYSCLK2n
XO OSC
1
PLL
CLOCK
HS_CLOCK
DP D+ C
HS_DAT0-7 D0-D7 Serializer USB 2.0 ATX
ULPI O
HS_DIR DIR if logic Termination DM D- N
Deserializer
Resistors
HS_STP STP
Reg
VBUS
HS_NXT NXT
map
CSn ID GND
ID det
ULPI_CS
VBUS
POR VBUS
VDD3V3 Comp
Internal
VDD1V8
power Chrg/
dischrg
VBAT VBAT Voltage resistors
regulators
VIO 1.8V
VIO
REF Int Ref
Voltage
PSW_N
1230-1858 rev. 1 100 (125)