Samsung DRX100 Service Manual page 39

Digital satellite receiver
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SERVICE MANUAL
7-9-2-4. Check the AGC Loop as follows.
I
Q
AGC_CTL
AGC Voltage
figure 7-9-2-4. I, Q signal wave form
7-9-2-5. Check the final Decoded Data output 'FECD' 0 to 7
7-9-2-6. Check the Output Control Signal as follows.
S-00-005(96.03.27)
: Junction of R125 & C118
: Junction of R131 & C121
: Junction of R122 & Pin 41 of U100
: TP101
Vp-p : 650mV
when The status of CH_SYNC is HIGH(+3.3V) the STB is channel
locking and the ERROR is HIGH(+3.3V) means there is no error
during channel locking.
Decoded Data
: Pin 11,12,13,14,17,18,19
BYTE_CLK
: TP117
F_START
: TP114
DATA_VALID
: TP116
CH_SYNC
: TP119
ERROR
: TP115
REV.1
Document No
Date of Origin
Date of REV
5us
PAGE REV.
0
51-L-DSR004
98-10-21
I
Q
or 20 of U100
PAGE
38/102

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