Panasonic SJ-MJ75 Service Manual page 53

Pin Mark I/O
No. Division
73 SMON0 O
74 FSEQ O
75 VP O
76 MCST —
77 MRASB O
78 FOK O
79 MWEB —
80 DEFECT O
81 MD1 I/O
82 FG I
83 CL I
84 CE I
85 MD0 I/O
86 DI I
87 VDD1 I
88 DO O
89 VDD2 I
90 VSS —
91 MD3 I/O
92 WRQB O
93 INTB O
terminal
Function
Monitor signal 0 output
terminal
(Not used, open)
Flame detection signal
output terminal (Not used,
open)
CLV servo clock
judgement signal output
terminal (Not used, open)
Not used, open
RAS signal to DRAM
output terminal (Not used,
open)
Focus OK signal output
terminal
Not used, open
Defect signal output
terminal
(Not used, open)
Data in/output terminal to
DRAM
(Not used, open)
Speed pulse input terminal
CPU interface data clock
input terminal
CPU interface chip enable
signal input terminal
Data in/output terminal to
DRAM
(Not used, open)
CPU interface data clock
input terminal
Power supply terminal
CPU interface data output
terminal
Power supply terminal
GND terminal
Data in/output terminal to
DRAM
CPU interface interrupt
signal output terminal
CPU interface interrupt
signal output terminal
53