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10.3.4 VisiPC self-tests
VisiPC Settings
Test Type
Test Level
All tests
All start-up tests
All internal tests
All external tests
Address decoder
Unused
Flash
All Flash areas
FBL software
Controller software
FPGA data
User Config data
Note: A failure of User Config data is indicated if config data has not been loaded – this
does not indicate a hardware fault.
Auto-detect
Do not save results
hardware
Save results to flash
Tip: Saving auto-detection results to flash is a quicker way of registering changes in
option card positions than re-loading configuration data, but has the same effect.
SRAM
Unused
Battery-backed
Unused
SRAM
Note: A failure of Battery-Backed SRAM is indicated after loading new config data – this
can be ignored. Press the rear panel CPU reset button and repeat the test.
Serial ports
Internal loopback
External loopback
Real-time clock
Unused
SCB registers
Unused
50
Siemens Building Technologies
Fire Safety & Security Products
A full list of all the VisiPC self-tests that can be selected is contained in Tab. 38.
Refer to the VisiPC Software User Manual for full details.
Hardware
Required
None
None
Loopback connectors fitted
to all serial ports
None
None
None
None
None
None
None
None
None
None
None
Loopback connectors fitted
to all serial ports
None
None
Precautions
Description
Repeats all start-up
test
Serial input signals
Tests all internal
should be removed or
devices
disabled during testing
See Tab. 39
Tests serial ports via
loopbacks
Tests all the
following areas
Test Flash Boot
Loader software
Tests Controller
Software
Tests FPGA data
Tests Fixed,
Variable and Default
configuration data.
Re-detects option
cards
Required if cards have
Re-detects option
been changed and
cards and saves
config data not
results to Flash.
reloaded
Tests all static RAM
memory
Tests all battery-
backed SRAM, used
for holding matrix
state while powered
down
Serial input signals
Tests all serial ports
should be removed or
using internal
disabled during testing
loopback switching
See Tab. 39
Tests all serial port
connections via
external loopback
connectors
Tests the clock
device
Tests internal Serial
Control Bus
communication
10.2008
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