Evaluation Board Manual
PPC750FX Evaluation Board
Table 10-7. PCI Connector Signals—J25 (Continued)
Pin
B92
Reserved
B93
Reserved
B94
GND
10.7 CPLD JTAG Connector
The CPLD may be programmed in place on the board via this JTAG connector and appropriate
downloading software. This is a 2x5 Berg type connector.
Figure 10-8. CPLD JTAG Connector—J26
Table 10-8. CPLD JTAG Connector—J26
Pin
1
ISP_TCK
2
GND
3
ISP_TDO
4
+3.3V
5
ISP_TMS
6
unused
7
unused
8
unused
9
ISP_TDI
10
GND
Connectors
Page 62 of 115
Signal
2
4
6
1
3
5
Pin
A92
Reserved
A93
GND
A94
Reserved
8
10
7
9
Signal Name
Preliminary
Signal
750FXebm_ch10.fm
June 10, 2003