Sony STR-KSL7 Service Manual page 27

• IC701 CXD9511AQ-1 (AUDIO DSP) (DIGITAL BOARD)
Pin No. Pin Name
1 VDD1
2 RAMCEN
3 , 4 RAMA16 - 15
5 to 7 SDIB0 - 2
8 XI
9 XO
10 VSS
11 AVDD
12 SDIB3
13 , 14 TEST
15 OVFB
16 DTSDATA
17 AC3DATA
18 SDOB3
19 CPO
20 AVSS
21 VDD2
22 SDOA2
23 SDOA1
24 SDOA0
25 to 29 RAMA14 - 10
30 VSS
31 VDD1
32 to 39 OPORT0 - 7
40 VSS
41 VDD2
42 to 44 RAMA9 - 7
45 to 47 SDOB2 - 0
48 SDBCK1
49 SDWCK1
50 VSS
51 VDD2
52 NONPCM
53 CRC
54 MUTE
55 KARAOKE
56 SURENC
57 SDBCK0
58 , 59 RAMA6 - 5
60 VSS
61 RAMA4
62 IC
63 TEST
64 RAMA3
65 CSB
66 CS
67 SO
68 SI
69 SCK
70 RAMA2
I/O
— Power supply (+5V for I/Os)
O External SRAM interface CE
O External SRAM interface address 16 -15 Not used (open)
I PCM input 0 - 2 to Sub DSP
I Crystal oscillator connection (12.288MHz)
O Crystal oscillator connection Not used (open)
— Ground
— Power supply (+3.3V for PLL circuit)
I PCM input 3 to Sub DSP Not used (open)
— Test terminal (to be open in normal use)
O Detection of overflow at Sub DSP Not used (open)
O Detection of DTS data Not used (open)
O Detection of AC-3 Not used (open)
O PCM output from Sub DSP Not used (open)
O Output terminal for PLL
— Ground (for PLL circuit)
— Power supply (+3.3V for core logic)
O PCM output from Main DSP (C, LFE) Not used (open)
O PCM output from Main DSP (LS, RS) Not used (open)
O PCM output from Main DSP (L, R) Not used (open)
O External SRAM interface address 14 - 10
— Ground
— Power supply (+5V for I/Os)
O Output port for general purpose Not used (open)
— Ground
— Power supply (+3.3V for core logic)
O External SRAM interface address 9-7
O PCM output from Sub DSP
I Bit clock input for SDOA, SDIB, SDOB Not used (open)
I Word clock input for SDOA, SDIB, SDOB Not used (open)
— Ground
— Power supply (+3.3V for core logic)
O Detection of non-PCM data Not used (open)
O Detection of AC-3 CRC error Not used (open)
O Detection of auto mute Not used (open)
O Detection of AC-3 karaoke data Not used (open)
O Detection of AC-3 2/0 mode Dolby surround encoded input Not used (open)
O Inverted SDBCK0 clock output Not used (open)
O External SRAM interface address 6 -5
— Ground
O External SRAM interface address 4
I Initial clear
— Test terminal (to be open in normal use)
O External SRAM interface address 3
I Sub DSP chip select
I Microprocessor interface chip select input
O Microprocessor interface serial data output
I Microprocessor interface / Sub DSP serial data input
I Microprocessor interface / Sub DSP clock input
O External SRAM interface address 2
STR-KSL7/SL7/TA-KSL7
Description
27