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Chipset Overview
The H8SSL-R10 serverboard is based on Serverworks' HT-1000 chipset, which
functions as a HyperTransport
high performance, scalability and reliability. Its HyperTransport architecture reduces
IO bottlenecks to improve overall system performance. System memory controllers
not part of the chipset but instead are integrated into the processors to decrease
latency.
HT-1000 HyperTransport I/O Hub
The HT-1000 I/O hub interconnects the CPU/host bridge with the I/O bridge via a
HyperTransport bus to provide an interface to the various subsystems including the
Super I/O functions, the onboard graphics, the IDE controller and the USB ports.
HyperTransport Technology
HyperTransport technology is a high-speed, low latency point to point link that was
designed to increase the communication speed by a factor of up to 48x between
integrated circuits. This is done partly by reducing the number of buses in the
chipset to reduce bottlenecks and by enabling a more effi cient use of memory in
multi-processor systems. The end result is a signifi cant increase in bandwidth
within the chipset.
TM
TM
SystemI/O
Hub. The HT-1000 chipset provides
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Chapter 1: Introduction
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