Dsc Schematic Diagram - JVC GR-DVP7U Service Manual

4.17

DSC SCHEMATIC DIAGRAM

0 1 MAIN (DSC)
TO REG
REG_1.8V
REG_3V
L8001
NQR0129-002X C8001
10 /6.3
T
5
GND
TO REGCON
CN114
TDI
TCMK
TMS
TRST
TO CAM.DSP TDA
R8011
0Ω
4
TO USBDRV
USBDOWN
L8003 NQR0129-002X
GIO3
GIO15
C8003
10 /6.3
GIO6 T
D0 C8004 C8005
0.1 0.1
D1
D2
D3
D4
D5
D6
D7
D8
IC8003
D9
3
D10 MBV160TE90PBA01
D11
[FLASH_MEMORY]
D12
D13
D14
D15
EM_CS2
FLSH_OE
FLSH_WE
TL8013
L8004 NQR0006-001X
VDD
C8006
10 /6.3 DQ0
T
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
TO CAM.DSP VDDQ
DSCO7 DQ5
DSCO6 DQ6
DSCO5 VSSQ
DSCO4 DQ7
2
DSCO3 VSSQ
DSCO2 VDD
DSCO1 DQM0
DSCO0 WE
DSYO7 CAS
DSYO6 RAS
DSYO5 CS
DSYO4 VSSQ
DSYO3 BA0
DSYO2 BA1
DSYO1
DSYO0
FLDDSC A10
HDDSC A0
VDDSC A1
CLKDSC A2
DQM2
DSYIO7 RA8004 VDD
10
DSYIO6 VDDQ
DSYIO5 DQ16
DSYIO4 VSSQ
DSYIO3 RA8003 DQ17
10
DSYIO2 DQ18
DSYIO1 VDDQ
DSYIO0 DQ19
DSCIO7 DQ20
RA8002
10
DSCIO6 VSSQ
1
DSCIO5 DQ21
DSCIO4 DQ22
DSCIO3 VDDQ
RA8001
C8007
10
DSCIO2 DQ23
0.1
DSCIO1 VDD
DSCIO0
CLK27B
∗
NOTE : The parts with marked ( ) is not used.
A B
NQR0129-002X
L8002
C8002
10 /6.3
T
TL8002 TL8001
L8005
NQR0129-002X
T
C8020 C8021
10 /6.3 0.1
∗
R8047
TL8009
R8016 10k
∗
R8017
R8018
0Ω
TL8004
VSS
DQ15
VSSQ
DQ14
C8010
DQ13 0.1
VDDQ
C8008
0.1
DQ12
DQ11
C8011
VSSQ
0.1
DQ10
DQ9 ∗
R8019
VDDQ
DQ8
R8013
0Ω
100k
NC
R8002
VSS
R8052
Q8001
DQM1
1k 22
NC
R8014
NC
2SA1774/RS/-X
CLK
CKE
A9
A8
R8022
A7
1M
L8006 NQR0006-001X
A6
R8006
A5
0Ω
A4
C8022
A3 VDD2 OE
1
DQM3 VSS2 CK33
VSS CK27 FS1
VDDQ TEST CK16 C8025
0.01
DQ31 C8023 AVDD DVDD
0.01
VDDQ C8027 ∗ AVSS DVSS
DQ30 XOUT 512
DQ29 XIN CLKA
R8012 22
0.01
VSSQ
C8024
DQ28
DQ27
IC8005
VDDQ
BU2288FV-X
R8057 56
DQ26 C8026
DQ25 0.01
VSSQ
R8058
DQ24
VSS
C D
NOTES : For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
C8019
0.1
DGND4
SDR_DQ2
SDR_DQ3
DGND8
EM_WE
EM_OE
SDR_CS
SDR_WE
SDR_CAS
EM_CS0
nc
EM_CS4
EM_WIDTH
EMU0
DSP_BDR
TEST1
TEST3
YIO5
DVDD6(3.3or1.8)
CIO7
CIO4
DVDD9
TDO
CVDD6_1.8V
SDO2 IC8001
PLLVDD2(1.8V)
PWDN
SDR_CKE
SCLK2
PLLVDD(1.8V)
EMU1 TMS320DSC24GZA
SDI1
DSP_BDX
DSP_BCLKR
SCAN
YIO7
DVDD5(3.3or1.8)
CGND4
YIO0
CIO5
CIO2
TRST
DGND9
MXO
VDIN
CVDD1_1.8V
SDR_RAS
SCLK1
CST1
DVDD3
CVDD2_1.8V
DGND1
DVDD11
YIO6
DGND3
YIO2
CVDD5_1.8V
CIO6
CIO3
TCK
SDI2
MXI
PLLGND2
SDR_CLK
∗
R8049
10k
E
4-35 4-36
C8018
0.1
R8037
10k
ARM_A20
ARM_A19
ARM_A18
ARM_A17
ARM_A16
CVDD8_1.8V
SDR_DQ24
SDR_DQ25
SDR_DQ27
SDR_DQ26
CVDD11_1.8V
ARM_A15
ARM_A14
ARM_A13
ARM_A12
SDR_DQ28
SDR_DQ29
SDR_DQ30
DGND7
SDR_DQ31
ARM_A5
ARM_A8
ARM_A9
ARM_A10
ARM_A11
SDR_A1
SDR_A0
SDR_A2
SDR_A6
SDR_A3
ARM_A2
ARM_A3
ARM_A6
ARM_A7
C8017
DVDD12
0.1
SDR_A4
SDR_A5
SDR_A7
SDR_A10
SDR_A9
YIN7
CGND7
GIO7
GIO11
R8005
GIO15
0Ω
GIO19
CVDD4_1.8V
TEST4
RESERVE
ARM_A1
EM_CS2
ARM_A4
SDR_A8
USB_VDD
SDR_A11
SDI3
YIN2
C8016
GVDD3_1.8V
0.1
GIO6
GIO10
DGND5
GIO20
CIN1
EM_CS1
R8004
0Ω C8014 C8015
0.1 0.1
y10279001a_rev0
F G
TO AUDIO AD/DA
44.1KHZ
DOLRCK2
11.2896MHZ
DOMCK2
32*44.1KHZ
DOBCK2
DODAT2
AIDAT2
TO SYSCON-CPU
FLSH_RST
DSC_RST TO SYSCON-CPU, USBDRV
DSC_CS
DSC_CLK
DSC_DT_IN
TO
DSC_DT_OUT
SYSCON-CPU
MXDT_OUT
CAPT_REQ
DSC_WKUP
DSC_STS
TO SD
GIO1
GIO2
GIO4
GIO17
EM_CS1
FLSH_OE
FLSH_WE
A8
A9
A10 TO USBDRV, SD
A11
A12
A13
A14
D0
D1
D2
D3
D4
D5 TO SD
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
H