Monitor Main Schematic Diagram - JVC GR-DVP7U Service Manual

4.16

MONITOR MAIN SCHEMATIC DIAGRAM

0 1 MAIN (MONITOR MAIN)
TO REG
MONI-15V
REG_12V
5
TO VF MAIN
M_REG3.0
TO REG
MM1385HN-X
REG_4.8V
IC7202
0.1
GND
4
LCD_G
LCD_R
TO VIDEO I/O
LCD_B
HDCVF
VDCVF
TO SYSCON-CPU
M_CS
S_CLK
S_DT_OUT
TO VIDEO I/O
3
MONI_PLL TL7201
L7205 C7231
TO REG
REG_3V
10µ
10 /6.3
2 TO SYSCON-CPU
M_BL_ON
∗
L7301
∗
C7303
∗
∗
C7304
D7302
C7302
∗
1
R7307
NOTE : The parts with marked (
A B
L7204
22µ
22µ
L7203
L7202
22µ
L7201
22µ
22 /4 22 /4
10 C7229
/6.3 0.1 0.1
0.1
C7219
T T T T T
4.7
/20
0.01
1.2K
C7227 4.7
/20
0.0068
R7222
100K
∗
R7223
VDD
HDO
VDO
RGT
VSS
HCK1
HCK2
R7230
100
HST
VDD
WIDE
DWN
VSS
CXA3582R
IC7201
R7304
∗ R7227
∗
100
R7303
∗
D7301
∗
R7306
∗
∗ T
10
10 /10
∗
∗ ∗
IC7301
∗
R7305
R7302
∗
R7301
∗
) is not used.
C
NOTES : For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
2SA1577/QR/-X
10K
R7224
4.7K R7225
C7230 Q7203
0.1
T T DTC144EE-X
1.5
1.5 /35
/35
C7218
C7215
3.3
/10
10K
R7217
∗
0Ω
0.1
C7211
B/B-Y
C7210 0.1
R/R-Y
C7209
G/Y
VCC1 0.1
OSD_G
OSD_R
OSD_B
∗
C7208 4.7
VREG_BIAS T /20
0.01 C7207 0Ω
SIG.C
1 C7206
PSIG_DC_DET
PSIG
10
R7214
VCC2
∗
∗
∗
1 1 1
10
10 10
D E
4-33 4-34
1
R7229
1K
y20194001a_rev0
F G
TO
REGCON CN114
MT_RPD
MT_COMCS
MT_PSIG
MT_G
MT_R
MT_B
TO MONITOR
CN401
CN113 CN113
QGF0306F1-39X
MT_B
MT_B
GND
MT_R
MT_R
GND
MT_G
MT_G
MT_RGT
MT_DOWN
MT_WIDE
MT_HST
MT_EN
MT_HCK1
MT_HCK2
REG_3V
GND
NC
BL-15V
BL-15V
NC
MT_PSIG
MT_PSIG
NC
MT_REF
NC
MT_VDD
MT_VDD
MT_COMCS
MT_COMCS
MT_VST
MT_VCK
MT_BL_ON
GND
GND
GND
GND
M_RVS
REG_3V
TO SYSCON-CPU
M_RVS
H