LG C1100 Service Manual page 23

Lg c1100 mobile phone service manual
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3. TECHNICAL BRIEF
3.5.2 AD6525 Architecture
The internal architecture of AD6525 is shown in Figure 3-10. AD6525 regroups three main
subsystems connected together through a dynamic and flexible communication bys network.
It also includes onboard system RAM (SRAM) and interfaces with external Flash Memory,
Baseband converter functions, and terminal functions like MMI, SIM and Universal System
Connector (USC).
The Digital Signal Processing (DSP) subsystem primarily hosts all the speech processing,
channel equalization and channel codec functions. The code used to implement such
functions can be stored in external Flash Memory and dynamically downloaded on demand
into the DSP's program RAM and Instruction Cache.
The microcontroller subsystem supports all the GSM terminal software, including the layer 1,
2 and 3 of the GSM protocol stack, the MMI, and applications software such as data
services, test and maintenance. It is tightly associated with on-chip system SRAM and also
includes boot ROM memory with a small dedicated routine to facilitate the initialization of the
external Flash Memory via code download using the on-chip serial interface to the external
Flash Memory interface.
The peripheral subsystem is composed of system peripherals such as interrupt controller,
real time clock, watch dog timer, power management and a timing and control module. It
also includes peripheral interfaces to the terminal functions: keyboard, battery supervision,
radio and display. Both the DSP and the MCU can access the peripheral subsystem via the
peripheral bus (PBUS).
For program and data storage, both the MCU subsystem and the DSP subsystem can
access the on chip system SRAM and external memory such Flash Memory. The access to
the SRAM module is made through the RAM Bus (RBUS) under the control of the bus
arbitration logic. Similarly, access to the Flash Memory is through the parallel External Bus
(EBUS).
AD6525
DSP
Subsystem
PBUS
DMA and BUS
ARBITRARION
MUC
Peripheral
Subsystem
Subsystem
(ARM7TDMI
RF-Control
MMI
USC
Figure 3-10. AD6525 INTERNAL ARCHITECTURE
- 22 -
Serial Link
DSP BUS
RBUS
SBUS
SRAM
®
)
AD6537B
EBUS
FLASH

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