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Echelon LonWorks LPT-11 User Manual

Link power transceiver
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L
W
®
ON
ORKS
LPT-11 Link Power
Transceiver
User's Guide
Version 1
@
ECHELON
®
C o r p o r a t i o n
078-0198-01A

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Summary of Contents for Echelon LonWorks LPT-11

  • Page 1 ® ORKS LPT-11 Link Power Transceiver User’s Guide Version 1 ECHELON ® C o r p o r a t i o n 078-0198-01A...
  • Page 2 Parts manufactured by vendors other than Echelon and referenced in this document have been described for illustrative purposes only, and may not have been tested by Echelon. It is the responsibility of the customer to determine the suitability of these parts for each application.

  • Page 3: Table Of Contents

    LPT-11 Pinout Network Connection Clock Input Neuron ® Chip Communications Port (CP) Lines PC Board Layout Guidelines Choosing the Inductor and Capacitors for the LPT-11 Switching Power Supply Alternative Inductor and Capacitor Selection for Low-Current Applications Mechanical Considerations Mechanical Footprint...
  • Page 4 Differences Between LPT-10 and LPT-11 Link Power Transceivers Functional Differences Differences in Form Modifications for Migrating from the LPT-10 to the LPT-11 Transcevier Appendix C - LPT-11 Transceiver-Based Device Checklist LPT-11 Transceiver-Based Device Checklist LPT-11 Transceiver and Neuron Chip Connections...

  • Page 5: Introduction

    Introduction The LPT-11 Link Power Twisted Pair Transceiver provides a simple, cost effective method of adding a network-powered L ORKS transceiver to any Neuron Chip-based sensor, activator, display, ® lighting device, or general purpose I/O controller. The LPT-11 transceiver consists of a Single In-Line Package (SIP) containing a...
  • Page 6 The LPT-11 contains built-in circuitry to allow connection to one or more FTT-10A transceivers back-to-back to make a repeater. The LPT-11 transceiver includes an integral switching power supply that can furnish +5VDC at up to 100mA.

  • Page 7: Applications

    The best solution for reducing installation and maintenance costs and simplifying system modifications is a free topology communication system that combines power and data on a common twisted wire pair. Echelon's link power technology offers just such a solution, and provides an elegant and inexpensive method of interconnecting the different elements of a distributed control system.
  • Page 8 Figure 1.1 Free Topology Link Power System Example LPT-11 Link Power Transceivers located along the twisted wire pair include integral switching power supplies. These supplies regulate the voltage on the twisted pair down to +5VDC at currents up to 100mA for use by the Neuron Chip and the various sensors, actuators, and displays.

  • Page 9: Audience

    Content This manual provides detailed technical specifications on the electrical and mechanical interfaces and operating environment characteristics for the LPT-11 transceiver module. This document also provides guidelines for migrating applications from a LonBuilder® Developer’s Workbench Emulator or NodeBuilder® Developer's Tool to a transceiver module-based product design.

  • Page 10: Related Documentation

    Related Documentation The following Echelon documents are suggested reading: LonBuilder User's Guide (078-0001-01) NodeBuilder User's Guide (078-0141-01) Neuron C Programmer's Guide (078-0002-01) LonBuilder Startup and Hardware Guide (078-0003-01) LPI-10 Link Power Interface Module User's Guide (078-0104-01) ORKS FTT-10A Free Topology Transceiver User's Guide (078-0156-01)

  • Page 11: Electrical Interface

    Electrical Interface The LPT-11 Link Power Transceiver’s 14 pins provide a polarity insensitive connection to the twisted pair network, an interface to the Neuron Chip communications port, and a switching power supply. LPT-11 Transceiver User’s Guide ORKS...

  • Page 12: Lpt-11 Pinout

    LPT-11 Pinout The pinout of the LPT-11 transceiver is shown in table 2.1. The interconnection between the LPT-11 and a Neuron Chip is shown in the block diagram in figure 2.1. See figure 3.1 for the physical location of pin 1.
  • Page 13 NET_A NET_B Network INDUCTOR CLOCK CIRCUIT GROUND GUARD CLK2 CLK1 IO0 - IO10 LPT-11 Link Power Transceiver Neuron 3120 Application or 3150 Chip Electronics Figure 2.1 LPT-11 Transceiver-to-Neuron Chip Interconnections LPT-11 Transceiver User’s Guide ORKS...

  • Page 14: Network Connection

    Neuron Chip's direct, single-ended mode over CP0-1. CP0 is the data input to the Neuron Chip and is connected to the LPT-11 transceiver's RXD pin. CP1 is the data output from the Neuron Chip and is connected to the TXD pin. These connections are summarized in table 2.2.
  • Page 15 Variations on this suggested PC board layout are possible as long as the general principles of grounding, shielding, guarding, and spacing are employed. For example, using a suitable fixture, the LPT-11 transceiver pins can be formed into a right angle before the transceiver is soldered onto the PC board. In this case, the layout in figure 2.2 would be modified to accommodate horizontal (90°) mounting of...
  • Page 16 The “INDUCTOR” trace from pin 4 of the LPT-11 transceiver to the input of inductor L1 can have voltage signals as high as 35Vp-p at 140kHz. This DC-DC switching waveform may generate moderate levels of electric field noise that can capacitively couple into any nearby high-impedance circuitry.

  • Page 17: Supply

    C2 to minimize switching noise. The CLK input to the LPT-11 transceiver (pin 7) needs to be guarded by ground traces to minimize clock noise, and to help keep EMI levels low (see Chapter 6). In general,...
  • Page 18 Suitable parts for the V+ input capacitor C1 are listed in table 2.4. C1 has the following specifications that must be met over the device's operating temperature range: C = 100µF ±20%, DCWV ≥63V, I ripple ≥100mA rms @ 100kHz. Echelon recommends the use of a high temperature rated capacitor (105°C minimum) due to the increased component operating life available with this type of construction.

  • Page 19: Alternative Inductor And Capacitor Selection For Low-Current Applications

    L1, C1, and C2 may be substituted for those components noted above. These components should have ratings of -40°C to +85° C minimum. For the C1 and C2 components, Echelon recommends the use of a high temperature rated capacitor (105°C minimum) due to the increased component operating life available with this type of construction.
  • Page 20 2-10 Electrical Interface...

  • Page 21: Mechanical Considerations

    Mechanical Considerations This chapter discusses the mechanical footprint and connectors of the LPT-11 Link Power Transceiver. Details of mounting the transceiver to an application electronics board containing a Neuron Chip are provided. LPT-11 Transceiver User’s Guide ORKS...

  • Page 22: Mechanical Footprint

    The LPT-11 has a notch on the top edge above Pin 1, as shown in figure 3.1. The fourteen connector pins are fabricated of solder tinned steel alloy.

  • Page 23: Power Output

    Power Output This section describes the power supply portion of the LPT-11 Link Power Transceiver, and provides suggestions for using the 5V output current. LPT-11 Transceiver User’s Guide ORKS...

  • Page 24: Transceiver Output Power

    The upper limit of the twisted pair network voltage is 42.4VDC at the output of the LPI-10 module. The actual voltage at the input to the LPT-11 transceiver will be a function of the network wiring topology and the power loading on the network. The LPT-11 transceiver has a lower input voltage limit of ≈26VDC, and the power supply...
  • Page 25 3. R must be large enough to keep the “effective capacitance” of C o1 as seen by the LPT-11 transceiver to less than 5% of the transceiver’s 22µF output capacitor C 2 . This can be accomplished by ensuring that ≥...

  • Page 26: Powering Non-Isolated Devices

    Powering Non-Isolated Devices In order to provide reliable common mode rejection, the link power system operates with one earth ground connection at the LPI-10 module, and all LPT-11 transceivers are isolated (floating) relative to ground. The LPT-11 transceiver power supply is designed to power devices that are ground isolated.

  • Page 27: Network Cabling And System Performance

    Network Cabling and System Performance This chapter provides information about cabling and network connections for the LPT-11 Link Power Transceiver. This information includes a discussion of wire characteristics and power distribution issues. LPT-11 Transceiver User’s Guide ORKS...

  • Page 28: Network Overview

    The link power system is designed to support free topology wiring, and will accommodate bus, star, loop, or any combination of these topologies. LPT-11 transceivers can be located at any point along the network wiring, as can the LPI-10 module and its associated power supply. This capability simplifies system installation and makes it easy to add devices should the system need to be expanded.
  • Page 29 (see Appendix A). Echelon's media routers can also be used to interconnect the link power system with any other L channel.

  • Page 30: System Performance And Cable Selection

    Ohm's Law. The transmission specification depends on such factors as resistance, mutual capacitance, and the velocity of signal propagation. Echelon has characterized system performance on several cable types whose typical electrical parameters are shown in table 5.1. Table 5.1 Cable Parameters Cable Type Wire dia.

  • Page 31: System Specifications

    System Specifications • Up to 128 LPT-11 transceivers or 64 FTT-10A/FT 31xx transceivers are allowed per network segment. • 1 Link Power Unit Load (LPUL) = 25ma@Vcc=5V. Therefore, 4 LPULs = 100ma, the recommended maximum for a single LPT-11 transceiver.

  • Page 32: Power Specifications, Simplified Form

    Table 5.3 Free Topology Specifications Maximum total wire length per Units network segment Belden 85102 meters Belden 8471 Level 4/22AWG JY (St) Y 2x2x0.8 Category 5 The maximum total wire length is the total amount of wire connected per network segment. This means the sum of all wire lengths used, not simply the wire in the path between two devices.
  • Page 33 320 meter branch length, Lumped loading or otherwise distributed application current: 25 mA devices 50 mA 100 mA 160 meter branch length, Lumped loading or otherwise distributed application current: 25 mA devices 50 mA 100 mA LPT-11 Transceiver User’s Guide ORKS...

  • Page 34: Power Specifications For Extended Performance

    Table 5.6 Simplified Power Specifications Using Level 4/22AWG (0.65mm) Wire Nominal Worst Units Case 400 meter branch length, Evenly distributed loading along a bus application current: 25 mA devices 50 mA 100 mA 400 meter branch length, Lumped loading or otherwise distributed application current: 25 mA devices...
  • Page 35 The distance of an LPT-11 transceiver from the LPI-10 module is the device distance, . For each branch, the sum of the products of a device distance and the application current of that device must not exceed a constant: α...
  • Page 36 In the following example, there are only two branches to check. Assume wire type is JY (St) Y 2x2x0.8 and average wire temperature is 25°C. Thus, α = 1. 2 devices 5 devices 2 devices 100mA each 100mA each 100mA each LPI-10 2 devices 5 devices...
  • Page 37 Step Three when applying the extended power performance specification. Example 1. Actual Network: 5x25 2x100 4x100 4x100 LPI-10 2x25 2x100 Simplification Step One: LPI-10 Simplification Step Two: LPI-10 Simplification Step Three and equivalent network for power specifications: LPI-10 LPT-11 Transceiver User’s Guide 5-11 ORKS...
  • Page 38 Here is a second example that illustrates the benefits of the extended performance specification and the importance of the sub-branching simplification procedure. Without simplifying the network, the sample topology fails to meet the power specification. However, the equivalent power network, which ignores the lengths of all but one of the sub-branches, meets the worst case extended performance power specification and is therefore an allowable topology.

  • Page 39: Cable Termination

    Figure 5.6 RC Network Commissioning LPT-11 Transceivers LPT-11 transceivers can be connected to any point of the twisted pair cable provided that the total wire and power limits are not exceeded. This design makes it simple to install both new systems and to expand existing systems.
  • Page 40 5-14 Network Cabling and System Performance...

  • Page 41: Design Issues

    Design Issues This chapter looks at design issues, and includes discussions of Electromagnetic Interference (EMI), Electrostatic Discharge (ESD), and surge for the LPT-11 Link Power Transceiver. LPT-11 Transceiver User’s Guide ORKS...

  • Page 42: Emi Design Issues

    RF currents that can cause radiation from a product if a length of wire or piece of metal can serve as an antenna. Products that use the LPT-11 transceivers together with a Neuron Chip will generally need to demonstrate compliance with EMI limits established by various regulatory agencies.
  • Page 43 By using 0.1µF or 0.01µF decoupling capacitors at each digital IC power pin, Vcc and logic ground noise can be reduced. Logic ground can then be used as a ground shield for other noisy digital signals and clock lines. LPT-11 Transceiver User’s Guide ORKS...
  • Page 44 Neuron Chip to the LPT-11 transceiver should be as short as practical, and in all cases ≤ 2cm. Pin 8 of LPT-11, a no-connect pin, can also be connected to GND to provide shielding up to the LPT-11 module.

  • Page 45: Esd Design Issues

    LPT-11 transceiver’s ground (pin 6) is connected directly to the largest section of the ground plane without any sensitive circuitry in the path. When the...

  • Page 46: Surge Design Issues

    (1.0kV) and level 3 (2.0kV) surge immunity can be attained with the addition of a bi- directional transient voltage suppresser (TVS). The TVS must be placed directly across Net_A and Net_B lines at each LPT-11 (not for use between either of the data lines and earth).

  • Page 47: Building Entrance Protection

    80% of data book unidirectional rating. Capacitance increases as voltage across the device decreases. Table 6.1 lists recommended TVS devices for use with LPT-11 transceivers. Note that bi-directional devices must be used. Table 6.1 Recommended TVS Devices...
  • Page 48 The following figure depicts twisted pair networks running in outdoor locations. Figure 6.3 Network and Shield Lightning Protection For maximum surge protection, every LPT-11 link power device on the network segment, whether located indoors or outdoors, has the protection circuitry described in the previous section.
  • Page 49 (AM) depth of 80%, and the frequency is slowly swept from 150kHz to 80MHz. Level 2 testing, which represents a “light industrial environment,” is performed with an injected common-mode voltage on the EUT’s network cable of 3Vrms (15.3Vp-p including LPT-11 Transceiver User’s Guide ORKS...
  • Page 50 (50.9Vp-p including the 80% AM). Note that the CDN test method is the preferred method according to the EN 61000- 4-6 specification. The T2 and S2 CDN models shown in the figures allow LPT-11 network communications to pass through them with negligible signal degradation.
  • Page 51 The LPT-11 transceiver-based device passes the 10Vrms EN-61000-4-6 Level 3 scan with good margin. For comparison, the CM noise immunity of the LPT-10 transceiver is also plotted in the figure. The CM noise immunity of the LPT-11 transceiver is significantly better than the LPT-10 transceiver.
  • Page 52 LPT-11 Transceiver LPT-11 Transceiver Common Mode Noise Immunity 16.00 80.00 75.00 14.00 70.00 65.00 12.00 60.00 55.00 10.00 50.00 LPT-10 Transceiver 45.00 8.00 40.00 35.00 6.00 30.00 25.00 4.00 20.00 15.00 2.00 10.00 5.00 0.00 0.00 100000.00 1000000.00 10000000.00 100000000.00 Frequency (Hz) Figure 6.6 LPT-11 Common-Mode Noise Immunity...

  • Page 53: Programming Considerations

    Programming Considerations This section explains the integration of the LPT-11 Link Power Transceiver using the LonBuilder Developer’s Workbench and NodeBuilder Development Tool. It covers considerations relating to channel definition and custom device image generation. LPT-11 Transceiver User’s Guide ORKS...

  • Page 54: Application Program Development And Export

    For updates to the development procedures, also see the ReadMe.txt file installed by the latest service pack for the development tool. Actual unit and system testing of an application targeted for an LPT-11-based device requires one or more Echelon Model 77040 FTM-10 SMX™ Standard Modular...
  • Page 55 App Node button and then the Properties button from the LonBuilder Navigator. Table 7.2 lists the hardware properties for a typical device using an LPT-11 transceiver. Table 7.2. Typical LonBuilder Hardware Template Values for a Device Using an LPT-11 Transceiver HW Property Name...
  • Page 56 The final step in the process is the selection of a target hardware platform. In the development phase, a LonBuilder Emulator is used. To select this target hardware, click the App Node button and then the Target HW button from the LonBuilder Navigator.

  • Page 57: Nodebuilder Development Tool

    Development Hardware Setup Application development for a device using an LPT-11 transceiver is typically performed using an LTM-10A/FT-10 Platform. Using this platform allows you to develop and test your device application before your target hardware is available.
  • Page 58 For flash memory parts, specify the sector size. For EEPROM memory, set the write time. A list of Echelon tested external memory components can be found on the Echelon website at www.echelon.com. Once the hardware template has been created, drag the new hardware template to the release target.

  • Page 59: References

    References This section provides a list of the reference material used in the preparation of this manual. LPT-11 Transceiver User’s Guide ORKS...

  • Page 60: Reference Documentation

    Reference Documentation The documentation used in this manual was from the following sources. Echelon Documents LPI-10 Link Power Interface Module User's Guide, Echelon Corporation, ORKS part number 078-0104-01. Toshiba TMPN3150 Neuron Chip data book, part number BPL9 99 805. Custom Node Development engineering bulletin, Echelon Corporation, ORKS 1992, part number 005-0024-01.

  • Page 61: Appendix A - Physical Layer Repeaters

    Appendix A Physical Layer Repeaters This section explains the physical layer repeater function of the LPT-11 transceiver. LPT-11 Transceiver User’s Guide ORKS...

  • Page 62: Physical Layer Repeaters

    L routers, which ORKS forward packets only when necessary. L Interoperability requires that there be a maximum of one repeater between any two LPT-11 or FTT-10A devices. LPT-11 Device LPT-11 Device...
  • Page 63 22V10 PAL that is shown in figure A.5 can also be found in the FTT-10A Free Topology Transceiver User’s Guide. The maximum Idd that can be drawn from the LPT-11 SIP is 100mA, so the total of the current consumption of the FTT-10A transceivers, plus the current consumption of the oscillator and any other circuitry must be less than or equal to 100mA maximum.
  • Page 64 Note that a toroidal or shielded inductor should be used for L1 on all physical layer repeaters. See Chapter 2 for LPT-11 transceiver component values L1 and C1, C2, C3. Other components per table 2.3 in FTT-10A Free Topology Transceiver User's Guide.
  • Page 65 Note that a toroidal or shielded inductor should be used for L1 on all physical layer repeaters. See Chapter 2 for LPT-11 transceiver component values L1 and C1, C2, C3. Other components per table 2.3 in FTT-10A Free Topology Transceiver User's Guide.
  • Page 66 Note that a toroidal or shielded inductor should be used for L1 on all physical layer repeaters. See Chapter 2 for LPT-11 transceiver component values L1 and C1, C2, C3. Add power supply bypass capacitors (not shown) next to oscillator, 74HCT4020 and PAL.
  • Page 67 Appendix B Differences Between LPT-10 and LPT-11 This appendix contains information on differences in design from the LPT-10 to the LPT-11 transceiver. LPT-11 Transceiver User’s Guide ORKS...

  • Page 68: Appendix B - Differences Between Lpt-10 And Lpt-11

    The LPT-11 transceiver supports operation at 20MHz. Differences In Form The LPT-11 transceiver has 2 less pins than the LPT-10: 14 pins on the LPT- 11 transceiver versus 16 pins on the LPT-10 transceiver. The 2 pins that have been eliminated are # 15 WAKEUP-OUT and #16 RX_ACTIVE The WAKEUP-OUT pin on the LPT-10 transceiver was eliminated since the wake up timer feature is no longer supported.
  • Page 69 In the LPT-10 transceiver the CLKSEL0 and the CLKSEL1 pins are used to select the frequency of the input clock. The new LPT-11 transceiver design has an auto clock select feature and does not require the functionality previously provided by the CLKSEL0 and the CLKSEL1 pins.
  • Page 70 Appendix B - Differences Between LPT-10 and LPT-11...

  • Page 71: Appendix C - Lpt-11 Transceiver-Based Device Checklist

    Appendix C LPT-11 Transceiver-Based Device Checklist This appendix includes a checklist to ensure that products using the LPT-11 transceiver meet the specifications presented in this user’s guide. LPT-11 Transceiver User’s Guide ORKS...

  • Page 72: Lpt-11 Transceiver-Based Device Checklist

    ≥5MHz and accurate to at least ±200ppm for compatibility with the L TP/FT-10 channel. Use of a 2.5MHz clock frequency is possible with the LPT-11 transceiver, but it is not compatible with the L TP/FT-10 channel. If required, a Low Voltage Interrupt (LVI) circuit with open collector output (such as the Motorola MC33064) is used to supply a reset signal to the Neuron Chip.

  • Page 73: Lpt-11 Dc-Dc Converter

    PCB that still has the LPT-10 SIP's 16- hole pattern, appropriate assembly instructions are in place to ensure that the 14-pin LPT-11 SIP is loaded with its pin-1 in the pin-1 hole of the LPT-10 pattern.

  • Page 74: Lpt-11 Transient Immunity

    LPT-11 Transient Immunity Item Check When Description Completed If 1.0kV or 2.0kV surge immunity is desired, an appropriate TVS device from table 6.1 is placed differentially across NET_A and NET_B. For 0.5kV surge immunity, no TVS should be needed. The device's package is designed to prevent ESD hits from arcing into the node's internal circuitry.

  • Page 75: Lpt-11 Physical Layer Repeater

    For physical layer repeaters that operate below 0°C, the PAL-based circuit shown in figure A.5 is used. The LPT-11 switching inductor L1 is a toroid or a shielded inductor type on the physical layer repeater or else no magnetic field coupling is seen when making the...
  • Page 76 Appendix C - Checklist...

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