Pin Configuration - Philips 14PT1501/12 Service Manual

EN 44 9. TE3.2E CA
9.4.2 Diagram A1, ST92195CD (IC I200)
Block Diagram
NMI
INT[7:4]
INT2
INT0
OSCIN
OSCOUT
RESET
RESETO
SDO/SDI
SCK
MCFM
VSO[2:1]
STOUT0
SDA1/SCL1
SDA2/SCL2

Pin Configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets
Up to 96
Kbytes ROM
256 or 512
bytes RAM
Up to 8
Kbytes
TRI
TDSRAM
256 bytes
Register File
8/16-bit
CPU
MMU
Interrupt
Management
ST9+ CORE
RCCU
16-BIT
TIMER/
WATCHDOG
SPI
TIMING AND
CLOCK CTRL
VOLTAGE
SYNTHESIS
STANDARD
1)
TIMER
2)
I²C
All alternate functions (Italic characters) are mapped on Ports 0, 2, 3, 4 and 5
Note 1: One standard timer on ST92195C devices, two standard timers on ST92195D devices
Note 2: I²C available on ST92195D devices only
INT7/P2.0
RESET
P0.7
P0.6
P0.5
P0.4
P0.3
AIN4/P0.2
P0.1
P0.0
CSO/RESET0/P3.7
P3.6
P3.5
P3.4
FB
SDA1/SDI/SDO/P5.1
SCL1/SCK/INT2/P5.0
V
DD
JTDO
WSCF
V
/WSCR
PP
AVDD3
TEST0
MCFM
JTCK
Figure 9-2 Internal block diagram and pin configuration
VPS/WSS
CONTROL
1 56 P2.1/INT5/AIN1
P2.2/INT0/AIN2
2 55
3 54 P2.3/INT6/VS01
4 53 P2.4/NMI
P2.5/AIN3/INT4/VS02
5 52
6 51 OSCIN
7 50 OSCOUT
P4.7/PWM7/EXTRG/STOUT0
8 49
9 48 P4.6/PWM6
10 47 P4.5/PWM5/SDA2
11 46 P4.4/PWM4/SCL2
12 45 P4.3/PWM3/TSLU/HT
13 44 P4.2/PWM2
14 43 P4.1/PWM1
B 15 42 P4.0/PWM0
16 41 VSYNC
G
R 17 40 HSYNC/CSYNC
18 39 AVDD1
19 38 PXFM
20 37 JTRSTO
21 36 GND
22 35 AGND
34 CVBS1
23
24 33 CVBS2
25 32 JTMS
31
26 AVDD2
27 30 CVBSO
28 29 TXCF
I/O
P0[7:0]
8
PORT 0
I/O
P2[5:0]
6
PORT 2
I/O
4 P3[7:4]
PORT 3
I/O
P4[7:0]
8
PORT 4
I/O
2 P5[1:0]
PORT 5
DATA
TXCF
SLICER
& ACQUI-
CVBS1
SITION
UNIT
SYNC.
EXTRAC-
TION
WSCR
DATA
WSCF
SLICER
CVBS2
AIN[4:1]
ADC
EXTRG
VSYNC
SYNC
HSYNC/CSYNC
CSO
FREQ.
ON
PXFM
MULTIP.
SCREEN
R/G/B/FB
DISPLAY
TSLU
HT
PWM
D/A CON-
PWM[7:0]
VERTER
G_16010_019.eps
130206