LG LF-U850D Service Manual page 15

Name Pin NO.
MCLK 21
MIC_LRCK 22
MIC_BCK 23
MIC_SDIN 24
PWM_CH1_P 44
PWM_CH1_M 43
PWM_CH2_P 42
PWM_CH2_M 41
PWM_CH3_P 40
PWM_CH3_M 39
PWM_LOL_P 34
PWM_LOL_M 33
PWM_LOR_P 32
PWM_LOR_M 31
PWM_HP_L 29
PWM_HP_R 28
SDA 9
SCL 8
OVERLOAD 35
EPD_ENA 36
TEST_MODE1 25
TEST_MODE2 26
Type
PCM Audi o Input/Outp ut I nterface
O Main clock for external ADC.
Clock frequency is 256fs.
O PCM Word clock (left-right clock) output of external microphone.
Word clock rate is Fs(variable)
O PCM bit clock output of external microphone.
Bit clock frequency is 64 Fs (variable)
I PCM serial data input of external microphone.
Schmitt-Trigger input.
PWM Audio Out put
O Positive PWM output of channel 1.
O Negative PWM output of channel 1.
O Positive PWM output of channel 2.
O Negative PWM output of channel 2.
O Positive PWM output of channel 3.
O Negative PWM output of channel 3.
O Positive PWM output of Line out left
O Negative PWM output of Line out left
O Positive PWM output of Line out right
O Negative PWM output of Line out right
O Positive PWM output of headphone left channel.
O Positive PWM output of headphone right channel.
System Control Interface
I/O SDA for I2C mode.
I SCL for I2C mode.
Schmitt-Trigger input.
Speci al Control Interface
I Power stage overload indication input.
Polarity is programmable. Schmitt-Trigger input.
When OVERLOAD is asserted, all PWM audio outputs go to
"LOW" (if PWM_INVERT pin is 'LOW").
Internal pull-down resistor.
O External amplifier power device enable output.
Test M ode
Test mode selection pin 1.
In normal operation, it should be "LOW" or not connected.
I
Internal pull-down resistor.
Test mode selection pin 2.
I
In normal operation, it should be "LOW" or not connected.
Internal pull-down resistor.
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