Pci Mezzanine Interface - Motorola MVME2700 Series Installation And Use Manual

Mvme2700 series single board computer
Hide thumbs Also See for MVME2700 Series:
Table of Contents

Advertisement

Functional Description
5

PCI Mezzanine Interface

5-8
stored in the NVRAM (BBRAM) configuration area specified by boot
ROM. That is, the value 08003E2xxxxx is stored in NVRAM. At an
address of $FFFC1F2C, the upper four bytes (08003E2x) can be read. At
an address of $FFFC1F30, the lower two bytes (xxxx) can be read. The
MVME2700 debugger (the PPCBug firmware) has the capability to
retrieve or set the Ethernet station address.
If the data in NVRAM is lost, use the number on the label in the PMC
connector keepout area to restore it.
For the pin assignments of the transition module AUI or 10Base-
T/100Base-TX connector, refer to the user's manual for the MVME712M
or MVME761. Refer to the BBRAM/TOD Clock memory map description
in the MVME2600 Series Single Board Computer Programmer's
Reference Guide for detailed programming information.
A key feature of the MVME2700 family is the PCI (Peripheral Component
Interconnect) bus. In addition to the on-board local bus devices (SCSI,
Ethernet, graphics, etc.), the PCI bus supports an industry-standard
mezzanine interface, IEEE P1386.1 PMC (PCI Mezzanine Card).
PMC modules offer a variety of possibilities for I/O expansion through
FDDI (Fiber Distributed Data Interface), ATM (Asynchronous Transfer
Mode), graphics, Ethernet, or SCSI ports. The base board supports PMC
front panel and rear P2 I/O. There is also provision for stacking a PMC
carrier board on the base board for additional expansion.
The MVME2700 supports one PMC slot. Four 64-pin connectors on the
base board (J11, J12, J13, and J14) interface with 32-bit IEEE P1386.1
PMC-compatible mezzanines to add any desirable function. The PCI
Mezzanine Card slot has the following characteristics:
Mezzanine Type
PMC (PCI Mezzanine Card)
S1B: Single width, standard depth (75mm x 150mm) with
Mezzanine Size
front panel
PMC Connectors
J11, J12, J13, J14 (32/64-Bit PCI with front and rear I/O)
Signaling Voltage
V
= 5.0Vdc
io
Computer Group Literature Center Web Site

Advertisement

Table of Contents
loading

Table of Contents