Harman Kardon HK3490 Service Manual page 88

HK3490
ASAHI KASEI
No. Pin Name
55 AVDD
56 AVSS
57 RX0
58 NC
59 RX1
60 TEST1
61 RX2
62 NC
63 RX3
64 PVSS
65 R
66 PVDD
67 RX4
68 TEST2
69 RX5
70 CAD0
71 RX6
72 CAD1
73 RX7
74 I2C
75 DAUX2
76 VIN
77 MCLK
78 TX0
79 TX1
80 INT0
Note: All input pins except internal biased pins and Analog input pins (RX0-7, LIN, RIN) should not be left floating.
MS0339-E-00
I/O
- Analog Power Supply Pin, 4.75V∼5.25V
Analog Ground Pin, 0V
-
I Receiver Channel 0 Pin (Internal biased pin. Internally biased at PVDD/2)
No Connect pin
-
No internal bonding. This pin should be connected to PVSS.
I Receiver Channel 1 Pin (Internal biased pin. Internally biased at PVDD/2)
Test 1 Pin
I
This pin should be connected to PVSS.
I Receiver Channel 2 Pin (Internal biased pin. Internally biased at PVDD/2)
No Connect pin
-
No internal bonding. This pin should be connected to PVSS.
I Receiver Channel 3 Pin (Internal biased pin. Internally biased at PVDD/2)
- PLL Ground pin
External Resistor Pin
-
12kΩ +/-1% resistor should be connected to PVSS externally.
-
PLL Power supply Pin, 4.75V∼5.25V
I Receiver Channel 4 Pin (Internal biased pin. Internally biased at PVDD/2)
Test 2 Pin
I
This pin should be connected to PVSS.
I Receiver Channel 5 Pin (Internal biased pin. Internally biased at PVDD/2)
Chip Address 0 Pin (ADC/DAC part)
I
I Receiver Channel 6 Pin (Internal biased pin. Internally biased at PVDD/2)
Chip Address 1 Pin (ADC/DAC part)
I
I Receiver Channel 7 Pin (Internal biased pin. Internally biased at PVDD/2)
Control Mode Select Pin.
I
"L": 4-wire Serial, "H": I
I Auxiliary Audio Data Input Pin (DIR/DIT part)
I V-bit Input Pin for Transmitter Output
Master Clock Input Pin
I
O Transmit Channel (Through Data) Output 0 Pin
Transmit Channel Output1 pin
O When DIT bit = "0", Through Data.
When DIT bit = "1", DAUX2 Data.
O Interrupt 0 Pin
PVDD
20k(typ)
RX pin
20k(typ)
PVSS
Internal biased pin Circuit
88
Function
2
C Bus
VCOM
harman/kardon
[AK4589]
2004/09