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Checkpoint
MSB
8h
LED
#7
PCI Bus
0x50h
0
0x51h
0
0x52h
0
0x53h
0
0x54h
0
0x55h
0
0x56h
0
0x57h
0
USB
0x58h
0
0x59h
0
ATA/ATAPI/SATA
0x5Ah
0
0x5Bh
0
0x5Ch
0
0x5Dh
0
SMBUS
0x5Eh
0
0x5Fh
0
Local Console
146
Table 14. Diagnostic LED POST Code Decoder
Diagnostic LED Decoder
1 = On, 0= Off
Upper Nibble
4h
2h
1h
#6
#5
#4
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
Lower Nibble
LSB
8h
4h
2h
1h
#3
#2
#1
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
®
Intel
Server System SR1695GPRX Service Guide
Description
#0
Enumerating PCI buses
Allocating resources to
PCI buses
Hot Plug PCI controller
initialization
Reserved for PCI bus
Reserved for PCI bus
Reserved for PCI bus
Initializing USB host
controllers
Detecting USB devices
Resetting USB bus
Reserved for USB devices
Resetting SATA bus and
all devices
Detecting the presence of
ATA device
Enable SMART if
supported by ATA device
Reserved for ATA
Resetting SMBUS
Reserved for SMBUS
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