6.8.8 Host Terminating Write DMA
Table 39: Ultra DMA cycle timing chart (Host Terminating Write)
DMARQ
DMACK-
STOP
DDMARDY-
HSTROBE
DD(15:0)
Table 40: Ultra DMA cycle timings (Host Terminating Write)
PARAMETER
DESCRIPTION
(all values in ns)
tSS
Time from HSTROBE edge to asser-
tion of STOP
tLI
Limited interlock time
tMLI
Interlock time with minimum
tCS
CRC word setup time at device
tCH
CRC word hold time at device
tACK
Hold time for DMACK-
tIORDYZ
Maximum time before releasing
IORDY
tLI
tSS
tLI
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
MODE 0
MODE 1
MIN
MAX
MIN
50
–
50
0
150
0
20
–
20
15
–
10
5
–
5
20
–
20
–
20
–
Deskstar 7K500 and Deskstar E7K500 Hard Disk Drive Specification
tMLI
tIORDYZ
tLI
Host drives DD
MODE 2
MODE 3
MAX
MIN
MAX
MIN
MAX
–
50
–
50
150
0
150
0
100
–
20
–
20
–
7
–
7
–
5
–
5
–
20
–
20
20
–
20
–
20
42
tACK
tACK
tCH
tCS
CRC
xxxxxxxxxx
MODE 4
MODE 5
MIN
MAX
MIN
MAX
–
50
–
50
–
0
100
0
75
–
20
–
20
–
–
5
–
5
–
–
5
–
5
–
–
20
–
20
–
–
20
–
20
MODE 6
MIN
MAX
50
--
0
60
20
--
5
--
5
--
20
--
--
20