Table 4-4 OCR Register Definition
OCR Bit
The level coding of the OCR register is as follows:
•
restricted voltage windows=LOW
•
card busy=LOW (bit 31)
The least significant 31 bits are constant and will be set as described in Figure 4-6. If set, bit 32, the busy
bit, informs the host that the card power up procedure is finished.
00h
4.5.2
DSR Register
The DSR Register is not implemented in SanDisk
MultiMediaCards.
SanDisk MultiMediaCard Product Manual Rev. 2 © 2000 SANDISK CORPORATION
0-7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24-30
31
Card power up status bit (busy)
24
16
FFh
80h
Figure 4-6 OCR Structure
MultiMediaCard Product Manual
VDD Voltage Window
Reserved
2.0-2.1
2.1-2.2
2.2-2.3
2.3-2.4
2.4-2.5
2.5-2.6
2.6-2.7
2.7-2.8
2.8-2.9
2.9-3.0
3.0-3.1
3.1-3.2
3.2-3.3
3.3-3.4
3.4-3.5
3.5-3.6
reserved
8
0
00h
Reserved
Operating
Voltage Range
2.7 – 3.6 volt
Reserved
Busy Bit
27