Samsung SCH-3500 series Service Manual page 20

6-1-3 Baseband Part
MOBILE SYSTEM MODEM (MSM)
The MSM equipped with the ARM7TDMI core is an
important component of the CDMA cellular phone.
The MSM comes in a 196 pins BGA package. The
interface block diagram is shown on page 6-3.
MICROPROCESSOR INTERFACE
The interface circuitry consists of reset circuit,
address bus (A0-A19), data bus (AD0-AD15), and
memory controls (ALE, DT_R, HWR/, LWR/,
ROM_CS).
INPUT CLOCK
•CPU clock: 27 MHz
•TXCO(pin L2): 4.92 MHz. This clock signal from
the IFR is the reference clock for the MSM except
in CDMA mode.
•CHIPX8(pin H2) : 9.8304 MHz. The reference clock
used during the CDMA mode.
•SLEEP-XTAL-IN/OUT(pins M10, P12) : 32.768
kHz
IFT/IFR INTERFACE
CDMA, FM Data Interface
•TXIQDATA0-7 (pins L1, J3, K2, K1, J4, H3, J1, J2) :
TX data bus used during both CDMA and FM
mode.
•C_RX_IDATA0-3 (pins G1-G4) and
C_RX_QDATA0-3 (pins F1-F4) : RX data bus used
during CDMA mode.
•FM_RX_IDATA (pin E4) and FM_RX_QDATA (pin
E3) : RX data bus used during FM mode.
Clock
•TX_CLK (pin H1), TX_CLK/(pin H4) : Analog to
Digital Converter (ADC) reference clock used in
TX mode.
•CHIPX8 : ADC reference clock used in CDMA RX
mode.
•FMCLK : Reference clock in FM RX mode.
SAMSUNG Proprietary-Contents may change without notice
ADC Interface
ADC_CLK (pin C1), ADC_ENABLE (pin C2) and
ADC_DATA (pin B1) are required to control the
internal ADC in the IFT/IFR.
Data Port Interface
Includes the UART. Also, supports Diagnostic
Monitor (DM) and HP equipment interface.
CODEC Interface
The MSM outputs 2.048 MHz PCM_CLK (pin B11)
and 8 kHz PCM_SYNC (pin C11) to the CODEC
(U902). The voice PCM data from the MSM (U908)
PCM_DIN (pin A12) is compressed into 8 kHz by
QCELP algorithm in the CDMA mode. In FM mode,
the data is processed by D_FM.
RF Interface
TX : TX_AGC_ADJ (pin K3) port is used to control
the TX power level and PA_ON (pin L4) signal is
used to control the power amplifier.
RX : RX_AGC_ADJ (pin M1) port is used to control
the RX gain and TRK_LO_ADJ (pin N3) is used to
compensate the TCXO clock.
General Purpose I/O Register Pins
Input/output ports to control external devices.
Power Down Control
When the IDLE/ signal turns LOW, only the TX
sections will be disabled. If both the IDLE/ and
SLEEP/ changes to LOW, all the pins except for the
TXCO is disabled.
6-2
Circuit Description