Samsung SGH-E360 Service Manual page 10

Circuit Description
2-2-10. PCF5213EL1(UCP200)
The PCF5213EL1 is mainly composed of embeded DSP and ARM core. The DSP subsystem includes the Saturn
DSP core with embedded RAM and ROM, and a set of peripherals. It has 24kx16 bits PRAM, 104k*16 bits,
32k*16 XYRAM and 63k*16 XYROM in the DSP.
The ARM946E-S consists of an ARM9E-S processor core, 8 kbyte instruction cache and 8 kbyte data cache,
tghtly-coupled ITCM(Instruction Tightly Coupled Memory) and DTCM(Data Tightly Coupled Memory) memories, a
memory protection unit, and an AMBA(Advanced Microcontroller Bus Architecture) AHB(Advanced
High-performance Bus) bus interface with a write buffer.
HD(0:15), data lines and HA(0:23), address lines are connected to KAP17SG00A (memory), MV3018B (image dsp)
and YMU762 (melody IC). It has 64 kbyte SC RAM (0.5 Mbit) and 32 kbyte SC program ROM for bootstrap
loader in the ARM core.
HD(0:15), data lines and HA(0:23), address lines are connected to memory and YMU762 to communicate.
MV3018B(Camera DSP Chip) controls the communication between ARM core and DSP core.
OEn, WEn control the access of memory. KROW, and KCOL recognize the key string input status.
It has J-TAG control pins (TDI/TDO/TCK) for ARM and DSP core. J-SEL signal controls different access to ARM
and DSP core.
ADC(Analog to Digital Convertor) receives the condition of temperature, battery type and battery voltage.
2-2-11. TOH2600DGI4KRA (26MHz)(OSC101)
This system uses the 26MHz VCTCXO; TOH2600DGI4KRA. AFC control signal form PCF5213EL1 controls
frequency from 26MHz x-tal. It generates the clock frequency. This clock is connected to PCF5213EL1, YMU762 and
UAA3587C2.
2-2-12. Camera DSP(MV3018SAQ)(U306)
MV3018SAQ provides rich video functions up to 30-frame display with minimized tasks in the handset main processor
as well as hardware based real-time JPEG compression and decompression. MV3018SAQ directly transmits and
previews the RGB data to the LCD graphic memory by processing the sensor output data according to the
handset's command. It can save the raw RGB data up to VGA resoultion into its image buffer and allows the
host processor to download with scalable sized compressed data.
It utilizes 16 bit data bus for communication with the main processor, including bus interface types.
2-2-13. FM Radio (Si4700)
The Si4700 is a single chip electronically tuned FM stereo radio for low voltage application with fully integrated IF
selectivity and demodulation.
Si4700K provide FM mixer for conversion of the US/Europe (87.5 MHz to 108 MHz) and Japanese FM band (76 MHz
to 90 MHz) to IF.Preset tuning to receive Japanese TV audio up to 108 MHz, raster 100 kHz. and is connected to
PCF5213EL1 of I2C.
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