AOpen MX3W-E3 Online Manual page 6

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DDR (Double Data Rated) SDRAM................................................................................................................................89
DIMM (Dual In Line Memory Module) ............................................................................................................................89
DMA (Direct Memory Access) ........................................................................................................................................89
ECC (Error Checking and Correction)............................................................................................................................90
EDO (Extended Data Output) Memory...........................................................................................................................90
EEPROM (Electronic Erasable Programmable ROM) ....................................................................................................90
EPROM (Erasable Programmable ROM) .......................................................................................................................90
EV6 Bus ........................................................................................................................................................................91
FCC DoC (Declaration of Conformity)............................................................................................................................91
FC-PGA (Flip Chip-Pin Grid Array) ................................................................................................................................91
Flash ROM ....................................................................................................................................................................91
FSB (Front Side Bus) Clock...........................................................................................................................................92
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C Bus ..........................................................................................................................................................................92
IEEE 1394 .....................................................................................................................................................................92
Parity Bit........................................................................................................................................................................93
PBSRAM (Pipelined Burst SRAM) .................................................................................................................................93
PC-100 DIMM ................................................................................................................................................................93
PC-133 DIMM ................................................................................................................................................................93
PC-1600 or PC-2100 DDR DRAM .................................................................................................................................93
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