Pci Conventional Interrupt Routing Map - Intel DESKTOP BOARD D955XBK Manual

2.6 PCI Conventional Interrupt Routing Map

This section describes interrupt sharing and how the interrupt signals are connected between the
PCI Conventional bus connectors and onboard PCI Conventional devices. The PCI Conventional
specification describes how interrupts can be shared between devices attached to the PCI
Conventional bus. In most cases, the small amount of latency added by interrupt sharing does not
affect the operation or throughput of the devices. In some special cases where maximum
performance is needed from a device, a PCI Conventional device should not share an interrupt with
other PCI Conventional devices. Use the following information to avoid sharing an interrupt with a
PCI Conventional add-in card.
PCI Conventional devices are categorized as follows to specify their interrupt grouping:
•
INTA: By default, all add-in cards that require only one interrupt are in this category. For
almost all cards that require more than one interrupt, the first interrupt on the card is also
classified as INTA.
•
INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is
classified as INTB. (This is not an absolute requirement.)
•
INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a fourth
interrupt is classified as INTD.
The ICH7-R has eight Programmable Interrupt Request (PIRQ) input signals. All PCI
Conventional interrupt sources either onboard or from a PCI Conventional add-in card connect to
one of these PIRQ signals. Some PCI Conventional interrupt sources are electrically tied together
on the board and therefore share the same interrupt. Table 14 shows an example of how the
PIRQ signals are routed.
For example, using Table 14 as a reference, assume an add-in card using INTA is plugged into PCI
Conventional bus connector 3. In PCI bus connector 3, INTA is connected to PIRQB, which is
already connected to the ICH7-R audio controller. The add-in card in PCI Conventional bus
connector 3 now shares an interrupt with the onboard interrupt source.
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