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The 6850 register addresses are as follows:
$020001
(read)
$020001
(write)
$020003
(read)
$020003
(write)
See also the section below on Miscellaneous I/O for a description of bits which control normal operation and diagnostic loop-
back of the MIDI signals. Programming details for the 6850 can be found attached to the end of this document.
FRONT PANEL
The front panel consists of 16 alphanumeric LED characters and 24 pushbuttons. Software is responsible for refreshing the
display and scanning the buttons.
The display consists of 16 characters each of which has 14 segments and a decimal point. The characters are numbered 0-15
from left to right. A counter selects which character is actually activated at any instant. This counter may be reset to zero
(leftmost) by reading address $038000 and incremented (move one position right) by reading address $038001. Words
written to $038000 contain a 15 bit pattern that defines the segment pattern for the currently activated character. One bits
make segments light up.
Thus to produce a display, a software routine would rapidly sequence through one character at a time using the segment
pattern write and counter increment read functions. To avoid "ghosting", the segment pattern should be blanked while
incrementing the character counter. This may be accomplished either by writing zeroes to the segment register at $038000 or
reading address $038002. Also, to avoid visible flicker, a rate of 60 complete refreshes per second is desirable which figures
to about 1 millisecond hold time per character. During program development it is best to avoid leaving the display in a
stopped state with one character showing very brightly for long periods of time.
The keypad consists of 6 columns of 4 buttons each. The keypad is tied into the display refresh circuit. The 6 keypad
columns are activated one-at-a-time when the leftmost 6 display columns are activated. The leftmost character activates the
leftmost button column, etc. The state of the 4 buttons in the selected column may be read at address $038003. Bit 0 is the
topmost button in the column and bit 3 is the bottommost. A zero indicates a pressed button. Bits 4-7 are undefined and the
other 10 display columns do not select any buttons. Assuming a display refresh rate of approximately 60Hz, debouncing of
the button presses is not necessary.
CASSETTE INTERFACE
The cassette interface consists of a simple signal generator for writing and a signal polarity detector (zero-crossing detector)
for reading. Modulation and demodulation of the signal and coding and decoding of the data is up to the driver software.
The cassette signal generator is separate from the much more sophisticated sound generator and consists of a "poor man's D-
to-A converter" and a low-pass filter. The D-to-A converter can produce 9 different voltage levels (for an effective
resolution of 3+ bits) according to the 8-bit pattern written to address $03400E. The voltage level is proportional to the
number of ONE bits in the pattern. The location of the ones in the pattern is not important but it is desirable that they be
evenly distributed among the zeros when possible. A waveform is produced by simply writing an appropriate sequence of
K150FS Programmer's Model
Control Register
Status Register
Received Data Register
Transmit Data Register
8
13
5
14
15
4
12
3
1
2
11
4
9
10
6
Rev. A 26-APR-88
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