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The 80286
Inverse
Assembler
The 80286 inverse assembler has been designed to support the 80286
microprocessor with or without coprocessors. The following
paragraphs explain the operation of the inverse assembler and the
results you can expect in certain situations.
The 80286 can fetch instructions up to two bytes (16 bits) wide in a
single bus cycle. However, the microprocessor does not provide
enough status information to discriminate between the first code fetch
cycle of an instruction and subsequant code fetch cycles. You must
point to the state that contains the first byte of an instruction fetch.
Once synchronized, the inverse assembler will disassemble from this
state through the end of the screen.
To do this:
1.
Select a line on the display that you know is the first state of a code
fetch.
2. Roll this line to the top of the listing.
3. Select the "Invasm" field at the top of the display. The listing will
inverse assemble from the top line down. Any data before this
screen is left unchanged.
Rolling the screen up will inverse assemble the lines as they appear on
the bottom of the screen. If you jump to another area of the screen by
entering a new line number, you must re-synchronize the inverse
assembler by repeating steps 1 through 3.
Note
Each time you inverse assemble a block of memory, the
analyzer will keep that block in the inverse assembled
condition. You can inverse assemble several different blocks
in the analyzer memory, but the activity between those blocks
will not be inverse assembled.
Analyzing the Intel 80286
.
1-17
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