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Basic Data Channel 1 (BDC1)
Processor state 1 and its associated basic data channel
logic constitute BDC1. The 1/0 registers for state 1 are
part of the basic data channel logic the same as for BDC2,
as
shown in Figure 1-13. The basic data channel registers
and logic provide BDC1 with the same performance
features as those listed for BDC2, except that there are no
integrated adapters for BDC1.
Additionally, the assembly/disassembly logic contained on
another PC board enables BDC1 to perform 16-bit data
,._
j_
l
s
H
A
4
R
E
D
j_
....
....-
R
E
s
0
u
R
c
j_
E
s
j_
PROCESSOR 1
BASIC DATA. CHNL LOGIC
(GRP Ill EXT. REG.)
CHAN~
CONTROL
REGISTER
~
BYlrE
COUNT
=:TER
INBOUND CONTFIOL -
TAG IN LINES
INBOUND
DATA-
BUS IN REG .
(8 BITS)
OUTBOUND
CONTROL -
~
TAG OUT
REGISTER
OUTBOUND
DATA-
.....
p
BUS OUT REG.
I
(8 BITS)
I
transfers with main storage, by doubling the Bus In and
Bus Out register capacity. Although the data transfers
with external control units are still 8 bits, this logic
enables BDC1 to increase its data rate by only requiring
one main storage transfer for every two data transfers
with an external controller.
The external interface board performs the same. function
as
on BDC2. Here again, up to eight control units meeting
BDC1 interface requirements, which again are IBM
360/370 compatible, may be connected to the external
channel.
l
EXTERNAL
INTERFACE
(TO EXTE
EXTERNAL
CHANNEL
RNAL CONTROL UNITS)
STANDARD 8-BIT D ATA TRANSFER
~~
I
··t-----1---------·------f----1------------
4~
I
....._
l
....
j_
.....
p
--
EXTEnlDED
BUSIN
REGIS:TER
(8 BITS)
i - -
EXTENDED
BUS CIUT
REGISTER
(8 BITS)
I
I
~---1
I
I
I
I
I
I
~---'
ASS EMBLY /DISASS
(ALLOWS 16-BIT DA
EMBLY OPTION
TA TRANSFERS)
Figure 1-13. Basic Data Channel 1
1-17
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